aboutsummaryrefslogtreecommitdiff
path: root/tests/tcg/mips/mips32-dsp/extr_w.c
diff options
context:
space:
mode:
authorPetar Jovanovic <petarj@mips.com>2012-12-10 16:28:17 +0100
committerAurelien Jarno <aurelien@aurel32.net>2013-01-01 11:11:38 +0100
commitb8abbbe8df5e04085f4b85fc4f7cf85efbcd492c (patch)
tree597fbe25eec8e83317cf933f93106d938858aeab /tests/tcg/mips/mips32-dsp/extr_w.c
parenteec8972a5bc744eda695a86a984d746c240dff90 (diff)
target-mips: Fix for helpers for EXTR_* instructions
The change removes some unnecessary and incorrect code for EXTR_S.H. Further, it corrects the mask for shift value in the EXTR_ instructions. It also extends the existing tests so they trigger the issues corrected with the change. Signed-off-by: Petar Jovanovic <petarj@mips.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Diffstat (limited to 'tests/tcg/mips/mips32-dsp/extr_w.c')
-rw-r--r--tests/tcg/mips/mips32-dsp/extr_w.c23
1 files changed, 23 insertions, 0 deletions
diff --git a/tests/tcg/mips/mips32-dsp/extr_w.c b/tests/tcg/mips/mips32-dsp/extr_w.c
index 02ab9ecaae..bd6b0b95c2 100644
--- a/tests/tcg/mips/mips32-dsp/extr_w.c
+++ b/tests/tcg/mips/mips32-dsp/extr_w.c
@@ -44,5 +44,28 @@ int main()
assert(dsp == 0);
assert(result == rt);
+ /* Clear dspcontrol */
+ dsp = 0;
+ __asm
+ ("wrdsp %0\n\t"
+ :
+ : "r"(dsp)
+ );
+
+ ach = 0x3fffffff;
+ acl = 0x2bcdef01;
+ result = 0x7ffffffe;
+ __asm
+ ("mthi %2, $ac1\n\t"
+ "mtlo %3, $ac1\n\t"
+ "extr.w %0, $ac1, 0x1F\n\t"
+ "rddsp %1\n\t"
+ : "=r"(rt), "=r"(dsp)
+ : "r"(ach), "r"(acl)
+ );
+ dsp = (dsp >> 23) & 0x01;
+ assert(dsp == 0);
+ assert(result == rt);
+
return 0;
}