diff options
| author | TANG Tiancheng <tangtiancheng.ttc@alibaba-inc.com> | 2024-10-07 10:56:57 +0800 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2024-10-22 11:57:25 -0700 |
| commit | 1631f19b04fe29ba6c3c75a8c6decd3856da4853 (patch) | |
| tree | fe7dcf78e7bd76912d59c0c54d69827fe7aa07d4 /tcg | |
| parent | 101c1ef56221926718eb70d33ac2844d139d55e0 (diff) | |
tcg/riscv: Implement vector min/max ops
Signed-off-by: TANG Tiancheng <tangtiancheng.ttc@alibaba-inc.com>
Reviewed-by: Liu Zhiwei <zhiwei_liu@linux.alibaba.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20241007025700.47259-10-zhiwei_liu@linux.alibaba.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'tcg')
| -rw-r--r-- | tcg/riscv/tcg-target.c.inc | 33 | ||||
| -rw-r--r-- | tcg/riscv/tcg-target.h | 2 |
2 files changed, 34 insertions, 1 deletions
diff --git a/tcg/riscv/tcg-target.c.inc b/tcg/riscv/tcg-target.c.inc index 4758555565..35b244b7a2 100644 --- a/tcg/riscv/tcg-target.c.inc +++ b/tcg/riscv/tcg-target.c.inc @@ -294,6 +294,15 @@ typedef enum { OPC_VSSUBU_VV = 0x88000057 | V_OPIVV, OPC_VSSUBU_VI = 0x88000057 | V_OPIVI, + OPC_VMAX_VV = 0x1c000057 | V_OPIVV, + OPC_VMAX_VI = 0x1c000057 | V_OPIVI, + OPC_VMAXU_VV = 0x18000057 | V_OPIVV, + OPC_VMAXU_VI = 0x18000057 | V_OPIVI, + OPC_VMIN_VV = 0x14000057 | V_OPIVV, + OPC_VMIN_VI = 0x14000057 | V_OPIVI, + OPC_VMINU_VV = 0x10000057 | V_OPIVV, + OPC_VMINU_VI = 0x10000057 | V_OPIVI, + OPC_VMSEQ_VV = 0x60000057 | V_OPIVV, OPC_VMSEQ_VI = 0x60000057 | V_OPIVI, OPC_VMSEQ_VX = 0x60000057 | V_OPIVX, @@ -2406,6 +2415,22 @@ static void tcg_out_vec_op(TCGContext *s, TCGOpcode opc, set_vtype_len_sew(s, type, vece); tcg_out_opc_vv_vi(s, OPC_VSSUBU_VV, OPC_VSSUBU_VI, a0, a1, a2, c2); break; + case INDEX_op_smax_vec: + set_vtype_len_sew(s, type, vece); + tcg_out_opc_vv_vi(s, OPC_VMAX_VV, OPC_VMAX_VI, a0, a1, a2, c2); + break; + case INDEX_op_smin_vec: + set_vtype_len_sew(s, type, vece); + tcg_out_opc_vv_vi(s, OPC_VMIN_VV, OPC_VMIN_VI, a0, a1, a2, c2); + break; + case INDEX_op_umax_vec: + set_vtype_len_sew(s, type, vece); + tcg_out_opc_vv_vi(s, OPC_VMAXU_VV, OPC_VMAXU_VI, a0, a1, a2, c2); + break; + case INDEX_op_umin_vec: + set_vtype_len_sew(s, type, vece); + tcg_out_opc_vv_vi(s, OPC_VMINU_VV, OPC_VMINU_VI, a0, a1, a2, c2); + break; case INDEX_op_cmp_vec: tcg_out_cmpsel(s, type, vece, args[3], a0, a1, a2, c2, -1, true, 0, true); @@ -2442,6 +2467,10 @@ int tcg_can_emit_vec_op(TCGOpcode opc, TCGType type, unsigned vece) case INDEX_op_sssub_vec: case INDEX_op_usadd_vec: case INDEX_op_ussub_vec: + case INDEX_op_smax_vec: + case INDEX_op_smin_vec: + case INDEX_op_umax_vec: + case INDEX_op_umin_vec: case INDEX_op_cmp_vec: case INDEX_op_cmpsel_vec: return 1; @@ -2606,6 +2635,10 @@ static TCGConstraintSetIndex tcg_target_op_def(TCGOpcode op) case INDEX_op_sssub_vec: case INDEX_op_usadd_vec: case INDEX_op_ussub_vec: + case INDEX_op_smax_vec: + case INDEX_op_smin_vec: + case INDEX_op_umax_vec: + case INDEX_op_umin_vec: return C_O1_I2(v, v, vK); case INDEX_op_sub_vec: return C_O1_I2(v, vK, v); diff --git a/tcg/riscv/tcg-target.h b/tcg/riscv/tcg-target.h index 1d4d8878ce..7005099810 100644 --- a/tcg/riscv/tcg-target.h +++ b/tcg/riscv/tcg-target.h @@ -162,7 +162,7 @@ typedef enum { #define TCG_TARGET_HAS_shv_vec 0 #define TCG_TARGET_HAS_mul_vec 1 #define TCG_TARGET_HAS_sat_vec 1 -#define TCG_TARGET_HAS_minmax_vec 0 +#define TCG_TARGET_HAS_minmax_vec 1 #define TCG_TARGET_HAS_bitsel_vec 0 #define TCG_TARGET_HAS_cmpsel_vec 1 |