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authorRichard Henderson <richard.henderson@linaro.org>2019-06-27 17:34:47 +0000
committerRichard Henderson <richard.henderson@linaro.org>2019-07-09 08:26:11 +0200
commit11978f6f58f1d3d66429f7ff897524f693d823ce (patch)
treefa5d877c4858eeded149428d8ba426f8af5fd12a /tcg
parent7ab7e9c7c791d89edda799ef1295836918efb585 (diff)
tcg: Fix expansion of INDEX_op_not_vec
This operation can always be emitted, even if we need to fall back to xor. Adjust the assertions to match. Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'tcg')
-rw-r--r--tcg/tcg-op-vec.c6
1 files changed, 6 insertions, 0 deletions
diff --git a/tcg/tcg-op-vec.c b/tcg/tcg-op-vec.c
index c8fdc24f56..6714991bf4 100644
--- a/tcg/tcg-op-vec.c
+++ b/tcg/tcg-op-vec.c
@@ -90,6 +90,9 @@ bool tcg_can_emit_vecop_list(const TCGOpcode *list,
case INDEX_op_bitsel_vec:
/* These opcodes are mandatory and should not be listed. */
g_assert_not_reached();
+ case INDEX_op_not_vec:
+ /* These opcodes have generic expansions using the above. */
+ g_assert_not_reached();
default:
break;
}
@@ -438,11 +441,14 @@ static bool do_op2(unsigned vece, TCGv_vec r, TCGv_vec a, TCGOpcode opc)
void tcg_gen_not_vec(unsigned vece, TCGv_vec r, TCGv_vec a)
{
+ const TCGOpcode *hold_list = tcg_swap_vecop_list(NULL);
+
if (!TCG_TARGET_HAS_not_vec || !do_op2(vece, r, a, INDEX_op_not_vec)) {
TCGv_vec t = tcg_const_ones_vec_matching(r);
tcg_gen_xor_vec(0, r, a, t);
tcg_temp_free_vec(t);
}
+ tcg_swap_vecop_list(hold_list);
}
void tcg_gen_neg_vec(unsigned vece, TCGv_vec r, TCGv_vec a)