diff options
| author | Blue Swirl <blauwirbel@gmail.com> | 2011-09-18 14:55:46 +0000 |
|---|---|---|
| committer | Blue Swirl <blauwirbel@gmail.com> | 2012-03-18 12:21:52 +0000 |
| commit | e141ab52d2ea5d0bc6ad3b1ad32841127ca04adc (patch) | |
| tree | 9290ef9ce78430649ba092b1c755577c48bcf81c /tcg/tci/tcg-target.c | |
| parent | 6a18ae2d2947532d5c26439548afa0481c4529f9 (diff) | |
softmmu templates: optionally pass CPUState to memory access functions
Optionally, make memory access helpers take a parameter for CPUState
instead of relying on global env.
On most targets, perform simple moves to reorder registers. On i386,
switch from regparm(3) calling convention to standard stack-based
version.
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Diffstat (limited to 'tcg/tci/tcg-target.c')
| -rw-r--r-- | tcg/tci/tcg-target.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/tcg/tci/tcg-target.c b/tcg/tci/tcg-target.c index bd85073662..453f1875e2 100644 --- a/tcg/tci/tcg-target.c +++ b/tcg/tci/tcg-target.c @@ -798,6 +798,9 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args, case INDEX_op_qemu_st8: case INDEX_op_qemu_st16: case INDEX_op_qemu_st32: +#ifdef CONFIG_TCG_PASS_AREG0 + tcg_out_r(s, TCG_AREG0); +#endif tcg_out_r(s, *args++); tcg_out_r(s, *args++); #if TARGET_LONG_BITS > TCG_TARGET_REG_BITS @@ -808,6 +811,9 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args, #endif break; case INDEX_op_qemu_st64: +#ifdef CONFIG_TCG_PASS_AREG0 + tcg_out_r(s, TCG_AREG0); +#endif tcg_out_r(s, *args++); #if TCG_TARGET_REG_BITS == 32 tcg_out_r(s, *args++); |