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authorPeter Maydell <peter.maydell@linaro.org>2023-03-14 10:09:15 +0000
committerPeter Maydell <peter.maydell@linaro.org>2023-03-14 10:09:15 +0000
commit27a03171d02ee0de8de4e2d3bed241795d672859 (patch)
tree4a3aa9eb1e3aed0e96286357e8563a15fcb1f4fa /tcg/tcg.c
parent5cfda4ce79dd455f1726874a555260a70f84b2ec (diff)
parent0c8b6b9a6383e2e37ff3d1d12b40c58b7ed36c1c (diff)
Merge tag 'pull-tcg-20230313' of https://gitlab.com/rth7680/qemu into staging
accel/tcg: Fix NB_MMU_MODES to 16 Balance of the target/ patchset which eliminates tcg_temp_free Balance of the target/ patchset which eliminates tcg_const # -----BEGIN PGP SIGNATURE----- # # iQFRBAABCgA7FiEEekgeeIaLTbaoWgXAZN846K9+IV8FAmQPcb0dHHJpY2hhcmQu # aGVuZGVyc29uQGxpbmFyby5vcmcACgkQZN846K9+IV885AgAjDbg1soRBy0THf0X # CVXmQ4yYyUKAonZBL8Abt9yX01BhLFqEsrju3HiaLNOM9DbwWQ4gdvSrtAZ/K2YG # d6EvC+rJe79pr58MEEhqO4OO1ymp52amRHtEXva4vcKRNuM9WF5by/Hz2PsZyenG # ysaLBdddooA9SJeL7xYBMpKWFgUm3C8NzfaRfCBVcG94er9u8RUi0kx+drmOLw0g # vZ3Hekvi2I8Y5mWqvHeAIOsr8Md9PO3ezWxEteE4qsPNTTRfVD93oSGe9nNCYZTX # wWU51Vfv9GB6hOylAfMRIeCmkjks/gqLOGElsh1MaVovNDTXS5IKV/HgaLaocJHV # 2P81uQ== # =FpIY # -----END PGP SIGNATURE----- # gpg: Signature made Mon 13 Mar 2023 18:55:57 GMT # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "richard.henderson@linaro.org" # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full] # Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F * tag 'pull-tcg-20230313' of https://gitlab.com/rth7680/qemu: (91 commits) tcg: Drop tcg_const_* tcg: Drop tcg_const_*_vec target/tricore: Use min/max for saturate target/ppc: Avoid tcg_const_* in translate.c target/ppc: Fix gen_tlbsx_booke206 target/ppc: Rewrite trans_ADDG6S target/ppc: Avoid tcg_const_* in power8-pmu-regs.c.inc target/ppc: Avoid tcg_const_* in fp-impl.c.inc target/ppc: Avoid tcg_const_* in vsx-impl.c.inc target/ppc: Avoid tcg_const_* in xxeval target/ppc: Avoid tcg_const_* in vmx-impl.c.inc target/ppc: Avoid tcg_const_i64 in do_vcntmb target/m68k: Use tcg_constant_i32 in gen_ea_mode target/arm: Avoid tcg_const_ptr in handle_rev target/arm: Avoid tcg_const_ptr in handle_vec_simd_sqshrn target/arm: Avoid tcg_const_ptr in disas_simd_zip_trn target/arm: Avoid tcg_const_* in translate-mve.c target/arm: Avoid tcg_const_ptr in gen_sve_{ldr,str} target/arm: Improve trans_BFCI target/arm: Create gen_set_rmode, gen_restore_rmode ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'tcg/tcg.c')
-rw-r--r--tcg/tcg.c17
1 files changed, 1 insertions, 16 deletions
diff --git a/tcg/tcg.c b/tcg/tcg.c
index e4fccbd0d8..bb52bc060b 100644
--- a/tcg/tcg.c
+++ b/tcg/tcg.c
@@ -60,6 +60,7 @@
#include "elf.h"
#include "exec/log.h"
#include "tcg/tcg-ldst.h"
+#include "tcg/tcg-temp-internal.h"
#include "tcg-internal.h"
#include "accel/tcg/perf.h"
@@ -1444,22 +1445,6 @@ TCGv_vec tcg_constant_vec_matching(TCGv_vec match, unsigned vece, int64_t val)
return tcg_constant_vec(t->base_type, vece, val);
}
-TCGv_i32 tcg_const_i32(int32_t val)
-{
- TCGv_i32 t0;
- t0 = tcg_temp_new_i32();
- tcg_gen_movi_i32(t0, val);
- return t0;
-}
-
-TCGv_i64 tcg_const_i64(int64_t val)
-{
- TCGv_i64 t0;
- t0 = tcg_temp_new_i64();
- tcg_gen_movi_i64(t0, val);
- return t0;
-}
-
/* Return true if OP may appear in the opcode stream.
Test the runtime variable that controls each opcode. */
bool tcg_op_supported(TCGOpcode op)