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authorRichard Henderson <richard.henderson@linaro.org>2019-05-18 11:37:02 -0700
committerRichard Henderson <richard.henderson@linaro.org>2019-05-22 15:09:43 -0400
commit11e2bfef799024be4a08fcf6797fe0b22fb16b58 (patch)
tree0a5cb2aec8d91f6e6cf68ce2b4962e831ef57314 /tcg/ppc
parent9e27f58b9902834dffc0d66d9eb62f78d9c2a632 (diff)
tcg/i386: Use MOVDQA for TCG_TYPE_V128 load/store
This instruction raises #GP, aka SIGSEGV, if the effective address is not aligned to 16-bytes. We have assertions in tcg-op-gvec.c that the offset from ENV is aligned, for vector types <= V128. But the offset itself does not validate that the final pointer is aligned -- one must also remember to use the QEMU_ALIGNED() attribute on the vector member within ENV. PowerPC Altivec has vector load/store instructions that silently discard the low 4 bits of the address, making alignment mistakes difficult to discover. Aid that by making the most popular host visibly signal the error. Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'tcg/ppc')
0 files changed, 0 insertions, 0 deletions