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authorRichard Henderson <richard.henderson@linaro.org>2022-10-20 00:55:36 +1000
committerRichard Henderson <richard.henderson@linaro.org>2023-02-04 06:19:42 -1000
commit5e3d0c199f4edf4ecdf8100464da441c60ce36e3 (patch)
tree5158b2b91e0ffd80a66deae1f432ce6210db6b0f /tcg/mips
parent313bdea84d2912fdbb139e746bd9346b3d85ebdc (diff)
tcg: Introduce tcg_target_call_oarg_reg
Replace the flat array tcg_target_call_oarg_regs[] with a function call including the TCGCallReturnKind. Extend the set of registers for ARM to r0-r3 to match the ABI: https://github.com/ARM-software/abi-aa/blob/main/aapcs32/aapcs32.rst#result-return Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'tcg/mips')
-rw-r--r--tcg/mips/tcg-target.c.inc10
1 files changed, 6 insertions, 4 deletions
diff --git a/tcg/mips/tcg-target.c.inc b/tcg/mips/tcg-target.c.inc
index d419c4c1fc..80748d892e 100644
--- a/tcg/mips/tcg-target.c.inc
+++ b/tcg/mips/tcg-target.c.inc
@@ -136,10 +136,12 @@ static const TCGReg tcg_target_call_iarg_regs[] = {
#endif
};
-static const TCGReg tcg_target_call_oarg_regs[2] = {
- TCG_REG_V0,
- TCG_REG_V1
-};
+static TCGReg tcg_target_call_oarg_reg(TCGCallReturnKind kind, int slot)
+{
+ tcg_debug_assert(kind == TCG_CALL_RET_NORMAL);
+ tcg_debug_assert(slot >= 0 && slot <= 1);
+ return TCG_REG_V0 + slot;
+}
static const tcg_insn_unit *tb_ret_addr;
static const tcg_insn_unit *bswap32_addr;