aboutsummaryrefslogtreecommitdiff
path: root/tcg/aarch64
diff options
context:
space:
mode:
authorRichard Henderson <richard.henderson@linaro.org>2019-03-22 13:52:09 -0700
committerRichard Henderson <richard.henderson@linaro.org>2019-06-10 07:03:34 -0700
commita40ec84ee2b02086e27fab78a152c20b09c723cf (patch)
treecf5efed68e90ae2240ecf558eddb0e18d890e275 /tcg/aarch64
parent74433bf083b0766aba81534f92de13194f23ff3e (diff)
tcg: Create struct CPUTLB
Move all softmmu tlb data into this structure. Arrange the members so that we are able to place mask+table together and at a smaller absolute offset from ENV. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Acked-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'tcg/aarch64')
-rw-r--r--tcg/aarch64/tcg-target.inc.c10
1 files changed, 3 insertions, 7 deletions
diff --git a/tcg/aarch64/tcg-target.inc.c b/tcg/aarch64/tcg-target.inc.c
index 9e1dad9696..90957593a3 100644
--- a/tcg/aarch64/tcg-target.inc.c
+++ b/tcg/aarch64/tcg-target.inc.c
@@ -1637,12 +1637,8 @@ static void add_qemu_ldst_label(TCGContext *s, bool is_ld, TCGMemOpIdx oi,
label->label_ptr[0] = label_ptr;
}
-/* We expect tlb_mask to be before tlb_table. */
-QEMU_BUILD_BUG_ON(offsetof(CPUArchState, tlb_table) <
- offsetof(CPUArchState, tlb_mask));
-
/* We expect to use a 24-bit unsigned offset from ENV. */
-QEMU_BUILD_BUG_ON(offsetof(CPUArchState, tlb_table[NB_MMU_MODES - 1])
+QEMU_BUILD_BUG_ON(offsetof(CPUArchState, tlb_.f[NB_MMU_MODES - 1].table)
> 0xffffff);
/* Load and compare a TLB entry, emitting the conditional jump to the
@@ -1653,8 +1649,8 @@ static void tcg_out_tlb_read(TCGContext *s, TCGReg addr_reg, TCGMemOp opc,
tcg_insn_unit **label_ptr, int mem_index,
bool is_read)
{
- int mask_ofs = offsetof(CPUArchState, tlb_mask[mem_index]);
- int table_ofs = offsetof(CPUArchState, tlb_table[mem_index]);
+ int mask_ofs = offsetof(CPUArchState, tlb_.f[mem_index].mask);
+ int table_ofs = offsetof(CPUArchState, tlb_.f[mem_index].table);
unsigned a_bits = get_alignment_bits(opc);
unsigned s_bits = opc & MO_SIZE;
unsigned a_mask = (1u << a_bits) - 1;