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authorbellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162>2008-05-25 18:24:40 +0000
committerbellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162>2008-05-25 18:24:40 +0000
commit0a6b7b7813799f76e1859387688611af05db376c (patch)
tree0c14bc566be8e528d5ba1d379c2cfc90f65ff5bb /tcg/TODO
parentb314f2706b7db8def5d4e82024fd8e7d244493ef (diff)
update
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4581 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'tcg/TODO')
-rw-r--r--tcg/TODO31
1 files changed, 7 insertions, 24 deletions
diff --git a/tcg/TODO b/tcg/TODO
index 9189926106..5ca35e9f26 100644
--- a/tcg/TODO
+++ b/tcg/TODO
@@ -1,32 +1,15 @@
-- test macro system
+- Add new instructions such as: andnot, ror, rol, setcond, clz, ctz,
+ popcnt.
-- test conditional jumps
+- See if it is worth exporting mul2, mulu2, div2, divu2.
-- test mul, div, ext8s, ext16s, bswap
-
-- generate a global TB prologue and epilogue to save/restore registers
- to/from the CPU state and to reserve a stack frame to optimize
- helper calls. Modify cpu-exec.c so that it does not use global
- register variables (except maybe for 'env').
-
-- fully convert the x86 target. The minimal amount of work includes:
- - add cc_src, cc_dst and cc_op as globals
- - disable its eflags optimization (the liveness analysis should
- suffice)
- - move complicated operations to helpers (in particular FPU, SSE, MMX).
-
-- optimize the x86 target:
- - move some or all the registers as globals
- - use the TB prologue and epilogue to have QEMU target registers in
- pre assigned host registers.
+- Support of globals saved in fixed registers between TBs.
Ideas:
- Move the slow part of the qemu_ld/st ops after the end of the TB.
-- Experiment: change instruction storage to simplify macro handling
- and to handle dynamic allocation and see if the translation speed is
- OK.
-
-- change exception syntax to get closer to QOP system (exception
+- Change exception syntax to get closer to QOP system (exception
parameters given with a specific instruction).
+
+- Add float and vector support.