diff options
| author | Richard Henderson <richard.henderson@linaro.org> | 2019-03-25 14:16:46 +0000 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2019-03-25 14:16:46 +0000 |
| commit | a036f5302c13634f3d375615b2949fd1fa1657b6 (patch) | |
| tree | 52b9813dc6db0e5e17f3b58e68a9e20472497767 /target | |
| parent | c442b7b4a7ae8696bcdf46091d781bd9052731be (diff) | |
target/arm: Fix non-parallel expansion of CASP
The second word has been loaded from the unincremented
address since the first commit.
Fixes: 44ac14b06fa
Reported-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Tested-by: Alex Bennée <alex.bennee@linaro.org>
Message-id: 20190322234302.12770-1-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target')
| -rw-r--r-- | target/arm/translate-a64.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index 1959046343..dcdeb80176 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -2510,7 +2510,7 @@ static void gen_compare_and_swap_pair(DisasContext *s, int rs, int rt, tcg_gen_qemu_ld_i64(d1, clean_addr, memidx, MO_64 | MO_ALIGN_16 | s->be_data); tcg_gen_addi_i64(a2, clean_addr, 8); - tcg_gen_qemu_ld_i64(d2, clean_addr, memidx, MO_64 | s->be_data); + tcg_gen_qemu_ld_i64(d2, a2, memidx, MO_64 | s->be_data); /* Compare the two words, also in memory order. */ tcg_gen_setcond_i64(TCG_COND_EQ, c1, d1, s1); |