diff options
| author | Paolo Bonzini <pbonzini@redhat.com> | 2024-05-25 10:03:22 +0200 |
|---|---|---|
| committer | Michael Tokarev <mjt@tls.msk.ru> | 2024-05-27 22:05:52 +0300 |
| commit | 2cd8deb0d988549255b4530b5fe2dfe402c5f94a (patch) | |
| tree | 84e05ec518d77738d52f733e476f515f0f810443 /target | |
| parent | 89ed6d4b6c119e0860ba450e6cb1395e05c83d39 (diff) | |
target/i386: no single-step exception after MOV or POP SS
Intel SDM 18.3.1.4 "If an occurrence of the MOV or POP instruction
loads the SS register executes with EFLAGS.TF = 1, no single-step debug
exception occurs following the MOV or POP instruction."
Cc: qemu-stable@nongnu.org
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
(cherry picked from commit f0f0136abba688a6516647a79cc91e03fad6d5d7)
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
Diffstat (limited to 'target')
| -rw-r--r-- | target/i386/tcg/translate.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/target/i386/tcg/translate.c b/target/i386/tcg/translate.c index c2c5e73b3f..a55df176c6 100644 --- a/target/i386/tcg/translate.c +++ b/target/i386/tcg/translate.c @@ -2817,7 +2817,7 @@ do_gen_eob_worker(DisasContext *s, bool inhibit, bool recheck_tf, bool jr) if (recheck_tf) { gen_helper_rechecking_single_step(tcg_env); tcg_gen_exit_tb(NULL, 0); - } else if (s->flags & HF_TF_MASK) { + } else if ((s->flags & HF_TF_MASK) && !inhibit) { gen_helper_single_step(tcg_env); } else if (jr && /* give irqs a chance to happen */ |