diff options
author | Janosch Frank <frankja@linux.ibm.com> | 2019-11-27 12:50:42 -0500 |
---|---|---|
committer | Cornelia Huck <cohuck@redhat.com> | 2019-12-14 10:25:50 +0100 |
commit | eac4f82791f1807c423e85670837db103b9d59b3 (patch) | |
tree | a8f9e66fba44f15fb99f8b010f317efbaadc1a1c /target | |
parent | ec9227339fce99412830d44a37eb0bd2fadd5f75 (diff) |
s390x: Move reset normal to shared reset handler
Let's start moving the cpu reset functions into a single function with
a switch/case, so we can later use fallthroughs and share more code
between resets.
This patch introduces the reset function by renaming cpu_reset().
Signed-off-by: Janosch Frank <frankja@linux.ibm.com>
Reviewed-by: David Hildenbrand <david@redhat.com>
Message-Id: <20191127175046.4911-3-frankja@linux.ibm.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Signed-off-by: Cornelia Huck <cohuck@redhat.com>
Diffstat (limited to 'target')
-rw-r--r-- | target/s390x/cpu-qom.h | 6 | ||||
-rw-r--r-- | target/s390x/cpu.c | 19 | ||||
-rw-r--r-- | target/s390x/cpu.h | 2 | ||||
-rw-r--r-- | target/s390x/sigp.c | 2 |
4 files changed, 20 insertions, 9 deletions
diff --git a/target/s390x/cpu-qom.h b/target/s390x/cpu-qom.h index b809ec8418..f3b71bac67 100644 --- a/target/s390x/cpu-qom.h +++ b/target/s390x/cpu-qom.h @@ -34,6 +34,10 @@ typedef struct S390CPUModel S390CPUModel; typedef struct S390CPUDef S390CPUDef; +typedef enum cpu_reset_type { + S390_CPU_RESET_NORMAL, +} cpu_reset_type; + /** * S390CPUClass: * @parent_realize: The parent class' realize handler. @@ -57,7 +61,7 @@ typedef struct S390CPUClass { DeviceRealize parent_realize; void (*parent_reset)(CPUState *cpu); void (*load_normal)(CPUState *cpu); - void (*cpu_reset)(CPUState *cpu); + void (*reset)(CPUState *cpu, cpu_reset_type type); void (*initial_cpu_reset)(CPUState *cpu); } S390CPUClass; diff --git a/target/s390x/cpu.c b/target/s390x/cpu.c index 3abe7e80fd..67d6fbfa44 100644 --- a/target/s390x/cpu.c +++ b/target/s390x/cpu.c @@ -82,18 +82,25 @@ static void s390_cpu_load_normal(CPUState *s) } #endif -/* S390CPUClass::cpu_reset() */ -static void s390_cpu_reset(CPUState *s) +/* S390CPUClass::reset() */ +static void s390_cpu_reset(CPUState *s, cpu_reset_type type) { S390CPU *cpu = S390_CPU(s); S390CPUClass *scc = S390_CPU_GET_CLASS(cpu); CPUS390XState *env = &cpu->env; - env->pfault_token = -1UL; - env->bpbc = false; scc->parent_reset(s); cpu->env.sigp_order = 0; s390_cpu_set_state(S390_CPU_STATE_STOPPED, cpu); + + switch (type) { + case S390_CPU_RESET_NORMAL: + env->pfault_token = -1UL; + env->bpbc = false; + break; + default: + g_assert_not_reached(); + } } /* S390CPUClass::initial_reset() */ @@ -102,7 +109,7 @@ static void s390_cpu_initial_reset(CPUState *s) S390CPU *cpu = S390_CPU(s); CPUS390XState *env = &cpu->env; - s390_cpu_reset(s); + s390_cpu_reset(s, S390_CPU_RESET_NORMAL); /* initial reset does not clear everything! */ memset(&env->start_initial_reset_fields, 0, offsetof(CPUS390XState, end_reset_fields) - @@ -473,7 +480,7 @@ static void s390_cpu_class_init(ObjectClass *oc, void *data) #if !defined(CONFIG_USER_ONLY) scc->load_normal = s390_cpu_load_normal; #endif - scc->cpu_reset = s390_cpu_reset; + scc->reset = s390_cpu_reset; scc->initial_cpu_reset = s390_cpu_initial_reset; cc->reset = s390_cpu_full_reset; cc->class_by_name = s390_cpu_class_by_name, diff --git a/target/s390x/cpu.h b/target/s390x/cpu.h index 17460ed7b3..18123dfd5b 100644 --- a/target/s390x/cpu.h +++ b/target/s390x/cpu.h @@ -741,7 +741,7 @@ static inline void s390_do_cpu_reset(CPUState *cs, run_on_cpu_data arg) { S390CPUClass *scc = S390_CPU_GET_CLASS(cs); - scc->cpu_reset(cs); + scc->reset(cs, S390_CPU_RESET_NORMAL); } static inline void s390_do_cpu_initial_reset(CPUState *cs, run_on_cpu_data arg) diff --git a/target/s390x/sigp.c b/target/s390x/sigp.c index 2ce22d4dc1..850139b9cd 100644 --- a/target/s390x/sigp.c +++ b/target/s390x/sigp.c @@ -266,7 +266,7 @@ static void sigp_cpu_reset(CPUState *cs, run_on_cpu_data arg) SigpInfo *si = arg.host_ptr; cpu_synchronize_state(cs); - scc->cpu_reset(cs); + scc->reset(cs, S390_CPU_RESET_NORMAL); cpu_synchronize_post_reset(cs); si->cc = SIGP_CC_ORDER_CODE_ACCEPTED; } |