diff options
| author | Richard Henderson <rth@twiddle.net> | 2017-06-16 17:05:50 -0700 |
|---|---|---|
| committer | Richard Henderson <rth@twiddle.net> | 2017-06-23 09:17:44 -0700 |
| commit | 6a68acd5b7bbf191a74d47ab38e27e5864d326d3 (patch) | |
| tree | 4b3a5bd4226210597258452c022eeecd1f8df164 /target | |
| parent | 37b8638d4347aaa72d359dc35e529937ec250bf4 (diff) | |
target/s390x: Implement execution-hint insns
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Diffstat (limited to 'target')
| -rw-r--r-- | target/s390x/insn-data.def | 9 | ||||
| -rw-r--r-- | target/s390x/translate.c | 5 |
2 files changed, 13 insertions, 1 deletions
diff --git a/target/s390x/insn-data.def b/target/s390x/insn-data.def index 05556864a2..8e3f7dbd76 100644 --- a/target/s390x/insn-data.def +++ b/target/s390x/insn-data.def @@ -134,6 +134,15 @@ D(0x8500, BRXLE, RSI, Z, 0, 0, 0, 0, bx32, 0, 1) D(0xec44, BRXHG, RIE_e, Z, 0, 0, 0, 0, bx64, 0, 0) D(0xec45, BRXHLE, RIE_e, Z, 0, 0, 0, 0, bx64, 0, 1) +/* BRANCH PREDICTION PRELOAD */ + /* ??? Format is SMI, but implemented as NOP, so we need no fields. */ + C(0xc700, BPP, E, EH, 0, 0, 0, 0, 0, 0) +/* BRANCH PREDICTION RELATIVE PRELOAD */ + /* ??? Format is MII, but implemented as NOP, so we need no fields. */ + C(0xc500, BPRP, E, EH, 0, 0, 0, 0, 0, 0) +/* NEXT INSTRUCTION ACCESS INTENT */ + /* ??? Format is IE, but implemented as NOP, so we need no fields. */ + C(0xb2fa, NIAI, E, EH, 0, 0, 0, 0, 0, 0) /* CHECKSUM */ C(0xb241, CKSM, RRE, Z, r1_o, ra2, new, r1_32, cksm, 0) diff --git a/target/s390x/translate.c b/target/s390x/translate.c index 5275c77036..06d56000c8 100644 --- a/target/s390x/translate.c +++ b/target/s390x/translate.c @@ -5443,6 +5443,7 @@ enum DisasInsnEnum { #define FAC_LPP S390_FEAT_SET_PROGRAM_PARAMETERS /* load-program-parameter */ #define FAC_DAT_ENH S390_FEAT_DAT_ENH #define FAC_E2 S390_FEAT_EXTENDED_TRANSLATION_2 +#define FAC_EH S390_FEAT_STFLE_49 /* execution-hint */ #define FAC_LZRB S390_FEAT_STFLE_53 /* load-and-zero-rightmost-byte */ static const DisasInsn insn_info[] = { @@ -5556,7 +5557,7 @@ static const DisasInsn *extract_insn(CPUS390XState *env, DisasContext *s, case 0x80: /* S */ case 0x82: /* S */ case 0x93: /* S */ - case 0xb2: /* S, RRF, RRE */ + case 0xb2: /* S, RRF, RRE, IE */ case 0xb3: /* RRE, RRD, RRF */ case 0xb9: /* RRE, RRF */ case 0xe5: /* SSE, SIL */ @@ -5572,6 +5573,8 @@ static const DisasInsn *extract_insn(CPUS390XState *env, DisasContext *s, case 0xcc: /* RIL */ op2 = (insn << 12) >> 60; break; + case 0xc5: /* MII */ + case 0xc7: /* SMI */ case 0xd0 ... 0xdf: /* SS */ case 0xe1: /* SS */ case 0xe2: /* SS */ |