diff options
| author | Richard Henderson <richard.henderson@linaro.org> | 2023-08-31 16:24:41 -0700 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2023-09-08 16:41:35 +0100 |
| commit | d03396a8bb19b77d4d0fa2ad2143999510f0d44e (patch) | |
| tree | c4c061c04393fc5471216866cc98c271aecef095 /target | |
| parent | 9cd0c0dec97be99c0b42b589e63fad6f8c6488b8 (diff) | |
target/arm: Enable SCTLR_EL1.TIDCP for user-only
The linux kernel detects and enables this bit. Once trapped,
EC_SYSTEMREGISTERTRAP is treated like EC_UNCATEGORIZED, so
no changes required within linux-user/aarch64/cpu_loop.c.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20230831232441.66020-6-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target')
| -rw-r--r-- | target/arm/cpu.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/target/arm/cpu.c b/target/arm/cpu.c index 0bb0585441..b9e09a702d 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -243,6 +243,10 @@ static void arm_cpu_reset_hold(Object *obj) SCTLR_EnDA | SCTLR_EnDB); /* Trap on btype=3 for PACIxSP. */ env->cp15.sctlr_el[1] |= SCTLR_BT0; + /* Trap on implementation defined registers. */ + if (cpu_isar_feature(aa64_tidcp1, cpu)) { + env->cp15.sctlr_el[1] |= SCTLR_TIDCP; + } /* and to the FP/Neon instructions */ env->cp15.cpacr_el1 = FIELD_DP64(env->cp15.cpacr_el1, CPACR_EL1, FPEN, 3); |