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authorPeter Maydell <peter.maydell@linaro.org>2020-09-21 18:55:39 +0100
committerPeter Maydell <peter.maydell@linaro.org>2020-09-21 18:55:39 +0100
commit4dad0a9aa818698e0735c8352bf7925a1660df6f (patch)
tree325a8c11dfaeb57fcd69a9613582a2c4ba3d29b4 /target
parent5df6c87e8080e0021e975c8387baa20cfe43c932 (diff)
parent8063396bf3459a810d24e3efd6110b8480f0de5b (diff)
Merge remote-tracking branch 'remotes/ehabkost/tags/machine-next-pull-request' into staging
QOM queue, 2020-09-18 Fixes: * Error value corrections (Markus Armbruster) * Correct object_class_dynamic_cast_assert() documentation (Eduardo Habkost) * Ensure objects using QEMU_ALIGNED are properly aligned (Richard Henderson) QOM cleanups (Eduardo Habkost): * Rename some constants * Simplify parameters of OBJECT_DECLARE* macros * Additional DECLARE_*CHECKER* usage * Additional OBJECT_DECLARE_TYPE usage * Additional OBJECT_DECLARE_SIMPLE_TYPE usage # gpg: Signature made Fri 18 Sep 2020 21:45:29 BST # gpg: using RSA key 5A322FD5ABC4D3DBACCFD1AA2807936F984DC5A6 # gpg: issuer "ehabkost@redhat.com" # gpg: Good signature from "Eduardo Habkost <ehabkost@redhat.com>" [full] # Primary key fingerprint: 5A32 2FD5 ABC4 D3DB ACCF D1AA 2807 936F 984D C5A6 * remotes/ehabkost/tags/machine-next-pull-request: Use OBJECT_DECLARE_SIMPLE_TYPE when possible Use OBJECT_DECLARE_TYPE when possible qom: Remove module_obj_name parameter from OBJECT_DECLARE* macros qom: Remove ParentClassType argument from OBJECT_DECLARE_SIMPLE_TYPE scripts/codeconverter: Update to latest version target/s390x: Set instance_align on S390CPU TypeInfo target/riscv: Set instance_align on RISCVCPU TypeInfo target/ppc: Set instance_align on PowerPCCPU TypeInfo target/arm: Set instance_align on CPUARM TypeInfo qom: Allow objects to be allocated with increased alignment qom: Correct error values in two contracts qom: Clean up object_property_get_enum()'s error value qom: Correct object_class_dynamic_cast_assert() documentation sifive: Use DECLARE_*CHECKER* macros sifive: Move QOM typedefs and add missing includes sifive_u: Rename memmap enum constants sifive_e: Rename memmap enum constants Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target')
-rw-r--r--target/alpha/cpu-qom.h2
-rw-r--r--target/arm/cpu-qom.h2
-rw-r--r--target/arm/cpu.c2
-rw-r--r--target/avr/cpu-qom.h2
-rw-r--r--target/cris/cpu-qom.h2
-rw-r--r--target/hppa/cpu-qom.h2
-rw-r--r--target/i386/cpu-qom.h2
-rw-r--r--target/i386/sev.c4
-rw-r--r--target/lm32/cpu-qom.h2
-rw-r--r--target/m68k/cpu-qom.h2
-rw-r--r--target/microblaze/cpu-qom.h2
-rw-r--r--target/mips/cpu-qom.h2
-rw-r--r--target/moxie/cpu.h2
-rw-r--r--target/nios2/cpu.h2
-rw-r--r--target/openrisc/cpu.h2
-rw-r--r--target/ppc/cpu-qom.h2
-rw-r--r--target/ppc/translate_init.c.inc1
-rw-r--r--target/riscv/cpu.c1
-rw-r--r--target/riscv/cpu.h2
-rw-r--r--target/rx/cpu-qom.h2
-rw-r--r--target/s390x/cpu-qom.h2
-rw-r--r--target/s390x/cpu.c1
-rw-r--r--target/sh4/cpu-qom.h2
-rw-r--r--target/sparc/cpu-qom.h2
-rw-r--r--target/tilegx/cpu.h2
-rw-r--r--target/tricore/cpu-qom.h2
-rw-r--r--target/unicore32/cpu-qom.h2
-rw-r--r--target/xtensa/cpu-qom.h2
28 files changed, 29 insertions, 26 deletions
diff --git a/target/alpha/cpu-qom.h b/target/alpha/cpu-qom.h
index 568fe3fb77..7bb9173c57 100644
--- a/target/alpha/cpu-qom.h
+++ b/target/alpha/cpu-qom.h
@@ -26,7 +26,7 @@
#define TYPE_ALPHA_CPU "alpha-cpu"
OBJECT_DECLARE_TYPE(AlphaCPU, AlphaCPUClass,
- alpha_cpu, ALPHA_CPU)
+ ALPHA_CPU)
/**
* AlphaCPUClass:
diff --git a/target/arm/cpu-qom.h b/target/arm/cpu-qom.h
index 94bbbd4473..a22bd506d0 100644
--- a/target/arm/cpu-qom.h
+++ b/target/arm/cpu-qom.h
@@ -28,7 +28,7 @@ struct arm_boot_info;
#define TYPE_ARM_CPU "arm-cpu"
OBJECT_DECLARE_TYPE(ARMCPU, ARMCPUClass,
- arm_cpu, ARM_CPU)
+ ARM_CPU)
#define TYPE_ARM_MAX_CPU "max-" TYPE_ARM_CPU
diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index 7b5ea65fab..a7643deab4 100644
--- a/target/arm/cpu.c
+++ b/target/arm/cpu.c
@@ -2290,6 +2290,7 @@ void arm_cpu_register(const ARMCPUInfo *info)
TypeInfo type_info = {
.parent = TYPE_ARM_CPU,
.instance_size = sizeof(ARMCPU),
+ .instance_align = __alignof__(ARMCPU),
.instance_init = arm_cpu_instance_init,
.class_size = sizeof(ARMCPUClass),
.class_init = info->class_init ?: cpu_register_class_init,
@@ -2305,6 +2306,7 @@ static const TypeInfo arm_cpu_type_info = {
.name = TYPE_ARM_CPU,
.parent = TYPE_CPU,
.instance_size = sizeof(ARMCPU),
+ .instance_align = __alignof__(ARMCPU),
.instance_init = arm_cpu_initfn,
.instance_finalize = arm_cpu_finalizefn,
.abstract = true,
diff --git a/target/avr/cpu-qom.h b/target/avr/cpu-qom.h
index 49d63faad2..9fa6989c18 100644
--- a/target/avr/cpu-qom.h
+++ b/target/avr/cpu-qom.h
@@ -27,7 +27,7 @@
#define TYPE_AVR_CPU "avr-cpu"
OBJECT_DECLARE_TYPE(AVRCPU, AVRCPUClass,
- avr_cpu, AVR_CPU)
+ AVR_CPU)
/**
* AVRCPUClass:
diff --git a/target/cris/cpu-qom.h b/target/cris/cpu-qom.h
index 2b0328113c..2596edc7e3 100644
--- a/target/cris/cpu-qom.h
+++ b/target/cris/cpu-qom.h
@@ -26,7 +26,7 @@
#define TYPE_CRIS_CPU "cris-cpu"
OBJECT_DECLARE_TYPE(CRISCPU, CRISCPUClass,
- cris_cpu, CRIS_CPU)
+ CRIS_CPU)
/**
* CRISCPUClass:
diff --git a/target/hppa/cpu-qom.h b/target/hppa/cpu-qom.h
index 58158f374b..d424f88370 100644
--- a/target/hppa/cpu-qom.h
+++ b/target/hppa/cpu-qom.h
@@ -26,7 +26,7 @@
#define TYPE_HPPA_CPU "hppa-cpu"
OBJECT_DECLARE_TYPE(HPPACPU, HPPACPUClass,
- hppa_cpu, HPPA_CPU)
+ HPPA_CPU)
/**
* HPPACPUClass:
diff --git a/target/i386/cpu-qom.h b/target/i386/cpu-qom.h
index 0505472e86..f9923cee04 100644
--- a/target/i386/cpu-qom.h
+++ b/target/i386/cpu-qom.h
@@ -31,7 +31,7 @@
#endif
OBJECT_DECLARE_TYPE(X86CPU, X86CPUClass,
- x86_cpu, X86_CPU)
+ X86_CPU)
typedef struct X86CPUModel X86CPUModel;
diff --git a/target/i386/sev.c b/target/i386/sev.c
index d976634b8f..93c4d60b82 100644
--- a/target/i386/sev.c
+++ b/target/i386/sev.c
@@ -31,9 +31,7 @@
#include "qom/object.h"
#define TYPE_SEV_GUEST "sev-guest"
-typedef struct SevGuestState SevGuestState;
-DECLARE_INSTANCE_CHECKER(SevGuestState, SEV_GUEST,
- TYPE_SEV_GUEST)
+OBJECT_DECLARE_SIMPLE_TYPE(SevGuestState, SEV_GUEST)
/**
diff --git a/target/lm32/cpu-qom.h b/target/lm32/cpu-qom.h
index e9eb495bf0..245b35cd1d 100644
--- a/target/lm32/cpu-qom.h
+++ b/target/lm32/cpu-qom.h
@@ -26,7 +26,7 @@
#define TYPE_LM32_CPU "lm32-cpu"
OBJECT_DECLARE_TYPE(LM32CPU, LM32CPUClass,
- lm32_cpu, LM32_CPU)
+ LM32_CPU)
/**
* LM32CPUClass:
diff --git a/target/m68k/cpu-qom.h b/target/m68k/cpu-qom.h
index a10429cf67..1ceb160ecb 100644
--- a/target/m68k/cpu-qom.h
+++ b/target/m68k/cpu-qom.h
@@ -26,7 +26,7 @@
#define TYPE_M68K_CPU "m68k-cpu"
OBJECT_DECLARE_TYPE(M68kCPU, M68kCPUClass,
- m68k_cpu, M68K_CPU)
+ M68K_CPU)
/*
* M68kCPUClass:
diff --git a/target/microblaze/cpu-qom.h b/target/microblaze/cpu-qom.h
index 82734b9b2b..e520eefb12 100644
--- a/target/microblaze/cpu-qom.h
+++ b/target/microblaze/cpu-qom.h
@@ -26,7 +26,7 @@
#define TYPE_MICROBLAZE_CPU "microblaze-cpu"
OBJECT_DECLARE_TYPE(MicroBlazeCPU, MicroBlazeCPUClass,
- microblaze_cpu, MICROBLAZE_CPU)
+ MICROBLAZE_CPU)
/**
* MicroBlazeCPUClass:
diff --git a/target/mips/cpu-qom.h b/target/mips/cpu-qom.h
index 93fbbdca1b..826ab13019 100644
--- a/target/mips/cpu-qom.h
+++ b/target/mips/cpu-qom.h
@@ -30,7 +30,7 @@
#endif
OBJECT_DECLARE_TYPE(MIPSCPU, MIPSCPUClass,
- mips_cpu, MIPS_CPU)
+ MIPS_CPU)
/**
* MIPSCPUClass:
diff --git a/target/moxie/cpu.h b/target/moxie/cpu.h
index d58761ccb1..bd6ab66084 100644
--- a/target/moxie/cpu.h
+++ b/target/moxie/cpu.h
@@ -52,7 +52,7 @@ typedef struct CPUMoxieState {
#define TYPE_MOXIE_CPU "moxie-cpu"
OBJECT_DECLARE_TYPE(MoxieCPU, MoxieCPUClass,
- moxie_cpu, MOXIE_CPU)
+ MOXIE_CPU)
/**
* MoxieCPUClass:
diff --git a/target/nios2/cpu.h b/target/nios2/cpu.h
index 1fa0fdaa35..86bbe1d867 100644
--- a/target/nios2/cpu.h
+++ b/target/nios2/cpu.h
@@ -33,7 +33,7 @@ typedef struct CPUNios2State CPUNios2State;
#define TYPE_NIOS2_CPU "nios2-cpu"
OBJECT_DECLARE_TYPE(Nios2CPU, Nios2CPUClass,
- nios2_cpu, NIOS2_CPU)
+ NIOS2_CPU)
/**
* Nios2CPUClass:
diff --git a/target/openrisc/cpu.h b/target/openrisc/cpu.h
index d0a8ee657a..bd42faf144 100644
--- a/target/openrisc/cpu.h
+++ b/target/openrisc/cpu.h
@@ -30,7 +30,7 @@ struct OpenRISCCPU;
#define TYPE_OPENRISC_CPU "or1k-cpu"
OBJECT_DECLARE_TYPE(OpenRISCCPU, OpenRISCCPUClass,
- openrisc_cpu, OPENRISC_CPU)
+ OPENRISC_CPU)
/**
* OpenRISCCPUClass:
diff --git a/target/ppc/cpu-qom.h b/target/ppc/cpu-qom.h
index 5cf806a3a6..5fdb96f04d 100644
--- a/target/ppc/cpu-qom.h
+++ b/target/ppc/cpu-qom.h
@@ -30,7 +30,7 @@
#endif
OBJECT_DECLARE_TYPE(PowerPCCPU, PowerPCCPUClass,
- powerpc_cpu, POWERPC_CPU)
+ POWERPC_CPU)
typedef struct CPUPPCState CPUPPCState;
typedef struct ppc_tb_t ppc_tb_t;
diff --git a/target/ppc/translate_init.c.inc b/target/ppc/translate_init.c.inc
index 230a062d29..accb4f2fae 100644
--- a/target/ppc/translate_init.c.inc
+++ b/target/ppc/translate_init.c.inc
@@ -10960,6 +10960,7 @@ static const TypeInfo ppc_cpu_type_info = {
.name = TYPE_POWERPC_CPU,
.parent = TYPE_CPU,
.instance_size = sizeof(PowerPCCPU),
+ .instance_align = __alignof__(PowerPCCPU),
.instance_init = ppc_cpu_instance_init,
.instance_finalize = ppc_cpu_instance_finalize,
.abstract = true,
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index 57c006df5d..0bbfd7f457 100644
--- a/target/riscv/cpu.c
+++ b/target/riscv/cpu.c
@@ -628,6 +628,7 @@ static const TypeInfo riscv_cpu_type_infos[] = {
.name = TYPE_RISCV_CPU,
.parent = TYPE_CPU,
.instance_size = sizeof(RISCVCPU),
+ .instance_align = __alignof__(RISCVCPU),
.instance_init = riscv_cpu_init,
.abstract = true,
.class_size = sizeof(RISCVCPUClass),
diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h
index 4c00d35ccd..de275782e6 100644
--- a/target/riscv/cpu.h
+++ b/target/riscv/cpu.h
@@ -234,7 +234,7 @@ struct CPURISCVState {
};
OBJECT_DECLARE_TYPE(RISCVCPU, RISCVCPUClass,
- riscv_cpu, RISCV_CPU)
+ RISCV_CPU)
/**
* RISCVCPUClass:
diff --git a/target/rx/cpu-qom.h b/target/rx/cpu-qom.h
index 6c5321078d..7310558e0c 100644
--- a/target/rx/cpu-qom.h
+++ b/target/rx/cpu-qom.h
@@ -27,7 +27,7 @@
#define TYPE_RX62N_CPU RX_CPU_TYPE_NAME("rx62n")
OBJECT_DECLARE_TYPE(RXCPU, RXCPUClass,
- rx_cpu, RX_CPU)
+ RX_CPU)
/*
* RXCPUClass:
diff --git a/target/s390x/cpu-qom.h b/target/s390x/cpu-qom.h
index e2b2513711..9f3a0d86c5 100644
--- a/target/s390x/cpu-qom.h
+++ b/target/s390x/cpu-qom.h
@@ -26,7 +26,7 @@
#define TYPE_S390_CPU "s390x-cpu"
OBJECT_DECLARE_TYPE(S390CPU, S390CPUClass,
- s390_cpu, S390_CPU)
+ S390_CPU)
typedef struct S390CPUModel S390CPUModel;
typedef struct S390CPUDef S390CPUDef;
diff --git a/target/s390x/cpu.c b/target/s390x/cpu.c
index 749cd548f0..e350edc9f5 100644
--- a/target/s390x/cpu.c
+++ b/target/s390x/cpu.c
@@ -517,6 +517,7 @@ static const TypeInfo s390_cpu_type_info = {
.name = TYPE_S390_CPU,
.parent = TYPE_CPU,
.instance_size = sizeof(S390CPU),
+ .instance_align = __alignof__(S390CPU),
.instance_init = s390_cpu_initfn,
.instance_finalize = s390_cpu_finalize,
.abstract = true,
diff --git a/target/sh4/cpu-qom.h b/target/sh4/cpu-qom.h
index 595814b8cb..8903b4b9c7 100644
--- a/target/sh4/cpu-qom.h
+++ b/target/sh4/cpu-qom.h
@@ -30,7 +30,7 @@
#define TYPE_SH7785_CPU SUPERH_CPU_TYPE_NAME("sh7785")
OBJECT_DECLARE_TYPE(SuperHCPU, SuperHCPUClass,
- superh_cpu, SUPERH_CPU)
+ SUPERH_CPU)
/**
* SuperHCPUClass:
diff --git a/target/sparc/cpu-qom.h b/target/sparc/cpu-qom.h
index 5d7fb727bc..f33949aaee 100644
--- a/target/sparc/cpu-qom.h
+++ b/target/sparc/cpu-qom.h
@@ -30,7 +30,7 @@
#endif
OBJECT_DECLARE_TYPE(SPARCCPU, SPARCCPUClass,
- sparc_cpu, SPARC_CPU)
+ SPARC_CPU)
typedef struct sparc_def_t sparc_def_t;
/**
diff --git a/target/tilegx/cpu.h b/target/tilegx/cpu.h
index d251ff80b8..c194c1a6fd 100644
--- a/target/tilegx/cpu.h
+++ b/target/tilegx/cpu.h
@@ -100,7 +100,7 @@ typedef struct CPUTLGState {
#define TYPE_TILEGX_CPU "tilegx-cpu"
OBJECT_DECLARE_TYPE(TileGXCPU, TileGXCPUClass,
- tilegx_cpu, TILEGX_CPU)
+ TILEGX_CPU)
/**
* TileGXCPUClass:
diff --git a/target/tricore/cpu-qom.h b/target/tricore/cpu-qom.h
index 9e588c4c34..59bfd01bbc 100644
--- a/target/tricore/cpu-qom.h
+++ b/target/tricore/cpu-qom.h
@@ -25,7 +25,7 @@
#define TYPE_TRICORE_CPU "tricore-cpu"
OBJECT_DECLARE_TYPE(TriCoreCPU, TriCoreCPUClass,
- tricore_cpu, TRICORE_CPU)
+ TRICORE_CPU)
struct TriCoreCPUClass {
/*< private >*/
diff --git a/target/unicore32/cpu-qom.h b/target/unicore32/cpu-qom.h
index c914273058..43621e7479 100644
--- a/target/unicore32/cpu-qom.h
+++ b/target/unicore32/cpu-qom.h
@@ -17,7 +17,7 @@
#define TYPE_UNICORE32_CPU "unicore32-cpu"
OBJECT_DECLARE_TYPE(UniCore32CPU, UniCore32CPUClass,
- unicore32_cpu, UNICORE32_CPU)
+ UNICORE32_CPU)
/**
* UniCore32CPUClass:
diff --git a/target/xtensa/cpu-qom.h b/target/xtensa/cpu-qom.h
index 299ce3e63c..41d9859673 100644
--- a/target/xtensa/cpu-qom.h
+++ b/target/xtensa/cpu-qom.h
@@ -35,7 +35,7 @@
#define TYPE_XTENSA_CPU "xtensa-cpu"
OBJECT_DECLARE_TYPE(XtensaCPU, XtensaCPUClass,
- xtensa_cpu, XTENSA_CPU)
+ XTENSA_CPU)
typedef struct XtensaConfig XtensaConfig;