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authorArtyom Tarasenko <atar4qemu@gmail.com>2016-06-09 10:16:03 +0200
committerArtyom Tarasenko <atar4qemu@gmail.com>2017-01-18 22:03:44 +0100
commit84f8f5876628963e67f66edde8a71208c4274ac8 (patch)
treefe8737f448c0a87a9bed1a10002436347713b42f /target/sparc
parent5c65df364af0a2cc60af318e5a3011ae5fce293a (diff)
target-sparc: use direct address translation in hyperprivileged mode
Please note that QEMU doesn't impelement Real->Physical address translation. The "Real Address" is always the "Physical Address". Suggested-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Artyom Tarasenko <atar4qemu@gmail.com>
Diffstat (limited to 'target/sparc')
-rw-r--r--target/sparc/cpu.h7
-rw-r--r--target/sparc/translate.c2
2 files changed, 4 insertions, 5 deletions
diff --git a/target/sparc/cpu.h b/target/sparc/cpu.h
index 857e93b12e..53afa18d6e 100644
--- a/target/sparc/cpu.h
+++ b/target/sparc/cpu.h
@@ -230,7 +230,7 @@ enum {
#if !defined(TARGET_SPARC64)
#define NB_MMU_MODES 3
#else
-#define NB_MMU_MODES 7
+#define NB_MMU_MODES 6
typedef struct trap_state {
uint64_t tpc;
uint64_t tnpc;
@@ -676,8 +676,7 @@ int cpu_sparc_signal_handler(int host_signum, void *pinfo, void *puc);
#define MMU_KERNEL_IDX 2
#define MMU_KERNEL_SECONDARY_IDX 3
#define MMU_NUCLEUS_IDX 4
-#define MMU_HYPV_IDX 5
-#define MMU_PHYS_IDX 6
+#define MMU_PHYS_IDX 5
#else
#define MMU_USER_IDX 0
#define MMU_KERNEL_IDX 1
@@ -723,7 +722,7 @@ static inline int cpu_mmu_index(CPUSPARCState *env, bool ifetch)
: (env->lsu & DMMU_E) == 0) {
return MMU_PHYS_IDX;
} else if (cpu_hypervisor_mode(env)) {
- return MMU_HYPV_IDX;
+ return MMU_PHYS_IDX;
} else if (env->tl > 0) {
return MMU_NUCLEUS_IDX;
} else if (cpu_supervisor_mode(env)) {
diff --git a/target/sparc/translate.c b/target/sparc/translate.c
index 109997684a..0f20ed0511 100644
--- a/target/sparc/translate.c
+++ b/target/sparc/translate.c
@@ -2143,7 +2143,7 @@ static DisasASI get_asi(DisasContext *dc, int insn, TCGMemOp memop)
case ASI_NUCLEUS_QUAD_LDD:
case ASI_NUCLEUS_QUAD_LDD_L:
if (hypervisor(dc)) {
- mem_idx = MMU_HYPV_IDX;
+ mem_idx = MMU_PHYS_IDX;
} else {
mem_idx = MMU_NUCLEUS_IDX;
}