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authorPeter Maydell <peter.maydell@linaro.org>2019-08-01 19:30:12 +0100
committerPeter Maydell <peter.maydell@linaro.org>2019-09-17 12:01:00 +0100
commitf8c3db33a5e863291182f8862ddf81618a7c6194 (patch)
treef289277316b2fd22f3935846fa181ef0cca3733f /target/sparc/cpu.c
parent9dffeec2e003a482ca858a887d3454c6bebed91e (diff)
target/sparc: Switch to do_transaction_failed() hook
Switch the SPARC target from the old unassigned_access hook to the new do_transaction_failed hook. This will cause the "if transaction failed" code paths added in the previous commits to become active if the access is to an unassigned address. In particular we'll now handle bus errors during page table walks correctly (generating a translation error with the right kind of fault status). Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Message-id: 20190801183012.17564-8-peter.maydell@linaro.org
Diffstat (limited to 'target/sparc/cpu.c')
-rw-r--r--target/sparc/cpu.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/target/sparc/cpu.c b/target/sparc/cpu.c
index ee60a5536a..bc65929552 100644
--- a/target/sparc/cpu.c
+++ b/target/sparc/cpu.c
@@ -877,7 +877,7 @@ static void sparc_cpu_class_init(ObjectClass *oc, void *data)
cc->gdb_write_register = sparc_cpu_gdb_write_register;
cc->tlb_fill = sparc_cpu_tlb_fill;
#ifndef CONFIG_USER_ONLY
- cc->do_unassigned_access = sparc_cpu_unassigned_access;
+ cc->do_transaction_failed = sparc_cpu_do_transaction_failed;
cc->do_unaligned_access = sparc_cpu_do_unaligned_access;
cc->get_phys_page_debug = sparc_cpu_get_phys_page_debug;
cc->vmsd = &vmstate_sparc_cpu;