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authorRichard Henderson <rth@twiddle.net>2017-07-18 10:02:30 -1000
committerAurelien Jarno <aurelien@aurel32.net>2017-07-18 23:39:16 +0200
commit1516184d8ea04f9ebd5d5c2009a2b795fc33b82a (patch)
tree2a94ea031a93a491d793f1c12a358baa2d1bd3f6 /target/sh4
parentca69176d52ca1b9c9c7a4229ca46cf858167c5e8 (diff)
target/sh4: Adjust TB_FLAG_PENDING_MOVCA
Don't leave an unused bit after DELAY_SLOT_MASK. Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net> Message-Id: <20170718200255.31647-6-rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Diffstat (limited to 'target/sh4')
-rw-r--r--target/sh4/cpu.h6
1 files changed, 3 insertions, 3 deletions
diff --git a/target/sh4/cpu.h b/target/sh4/cpu.h
index a7a6811a8c..319a7555e1 100644
--- a/target/sh4/cpu.h
+++ b/target/sh4/cpu.h
@@ -96,6 +96,8 @@
#define DELAY_SLOT_CONDITIONAL (1 << 1)
#define DELAY_SLOT_RTE (1 << 2)
+#define TB_FLAG_PENDING_MOVCA (1 << 3)
+
#define TB_FLAG_ENVFLAGS_MASK DELAY_SLOT_MASK
typedef struct tlb_t {
@@ -368,8 +370,6 @@ static inline int cpu_ptel_pr (uint32_t ptel)
#define PTEA_TC (1 << 3)
#define cpu_ptea_tc(ptea) (((ptea) & PTEA_TC) >> 3)
-#define TB_FLAG_PENDING_MOVCA (1 << 4)
-
static inline target_ulong cpu_read_sr(CPUSH4State *env)
{
return env->sr | (env->sr_m << SR_M) |
@@ -394,7 +394,7 @@ static inline void cpu_get_tb_cpu_state(CPUSH4State *env, target_ulong *pc,
| (env->fpscr & (FPSCR_FR | FPSCR_SZ | FPSCR_PR)) /* Bits 19-21 */
| (env->sr & ((1u << SR_MD) | (1u << SR_RB))) /* Bits 29-30 */
| (env->sr & (1u << SR_FD)) /* Bit 15 */
- | (env->movcal_backup ? TB_FLAG_PENDING_MOVCA : 0); /* Bit 4 */
+ | (env->movcal_backup ? TB_FLAG_PENDING_MOVCA : 0); /* Bit 3 */
}
#endif /* SH4_CPU_H */