diff options
| author | Aurelien Jarno <aurelien@aurel32.net> | 2017-07-02 18:18:14 +0200 |
|---|---|---|
| committer | Aurelien Jarno <aurelien@aurel32.net> | 2017-07-18 23:39:15 +0200 |
| commit | 57f5c1b093e1c3ec185770d2a180259205f980be (patch) | |
| tree | 900489d0e46111fb69f4b26820e7b702d6ebbf6d /target/sh4/helper.h | |
| parent | 6887dc6700ccb7820d8a9d370f421ee361c748e8 (diff) | |
target/sh4: do not check for PR bit for fabs instruction
The SH4 manual is not fully clear about that, but real hardware do not
check for the PR bit, which allows to select between single or double
precision, for the fabs instruction. This is probably what is meant by
"Same operation is performed regardless of precision."
Remove the check, and at the same time use a TCG instruction instead of
a helper to clear one bit.
LP: https://bugs.launchpad.net/qemu/+bug/1701821
Reported-by: Bruno Haible <bruno@clisp.org>
Message-Id: <20170702202814.27793-2-aurelien@aurel32.net>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Diffstat (limited to 'target/sh4/helper.h')
| -rw-r--r-- | target/sh4/helper.h | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/target/sh4/helper.h b/target/sh4/helper.h index dce859caea..f715224822 100644 --- a/target/sh4/helper.h +++ b/target/sh4/helper.h @@ -16,8 +16,6 @@ DEF_HELPER_3(macw, void, env, i32, i32) DEF_HELPER_2(ld_fpscr, void, env, i32) -DEF_HELPER_FLAGS_1(fabs_FT, TCG_CALL_NO_RWG_SE, f32, f32) -DEF_HELPER_FLAGS_1(fabs_DT, TCG_CALL_NO_RWG_SE, f64, f64) DEF_HELPER_FLAGS_3(fadd_FT, TCG_CALL_NO_WG, f32, env, f32, f32) DEF_HELPER_FLAGS_3(fadd_DT, TCG_CALL_NO_WG, f64, env, f64, f64) DEF_HELPER_FLAGS_2(fcnvsd_FT_DT, TCG_CALL_NO_WG, f64, env, f32) |