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authorAlistair Francis <alistair.francis@wdc.com>2022-10-12 11:14:49 +1000
committerAlistair Francis <alistair.francis@wdc.com>2022-10-14 14:36:19 +1000
commit47566421f029b0a489b63f8195b3ff944e017056 (patch)
tree3789591a775e05ed8aaaa06f1c0dcf90de03dc93 /target/riscv
parent1aae4a12dab4bf1adc249c2ac6178d15e4b5a77d (diff)
target/riscv: pmp: Fixup TLB size calculation
Since commit 4047368938f6 "accel/tcg: Introduce tlb_set_page_full" we have been seeing this assert ../accel/tcg/cputlb.c:1294: tlb_set_page_with_attrs: Assertion `is_power_of_2(size)' failed. When running Tock on the OpenTitan machine. The issue is that pmp_get_tlb_size() would return a TLB size that wasn't a power of 2. The size was also smaller then TARGET_PAGE_SIZE. This patch ensures that any TLB size less then TARGET_PAGE_SIZE is rounded down to 1 to ensure it's a valid size. Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: LIU Zhiwei<zhiwei_liu@linux.alibaba.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20221012011449.506928-1-alistair.francis@opensource.wdc.com Message-Id: <20221012011449.506928-1-alistair.francis@opensource.wdc.com>
Diffstat (limited to 'target/riscv')
-rw-r--r--target/riscv/pmp.c12
1 files changed, 12 insertions, 0 deletions
diff --git a/target/riscv/pmp.c b/target/riscv/pmp.c
index ea2b67d947..2b43e399b8 100644
--- a/target/riscv/pmp.c
+++ b/target/riscv/pmp.c
@@ -628,6 +628,18 @@ bool pmp_is_range_in_tlb(CPURISCVState *env, hwaddr tlb_sa,
}
if (*tlb_size != 0) {
+ /*
+ * At this point we have a tlb_size that is the smallest possible size
+ * That fits within a TARGET_PAGE_SIZE and the PMP region.
+ *
+ * If the size is less then TARGET_PAGE_SIZE we drop the size to 1.
+ * This means the result isn't cached in the TLB and is only used for
+ * a single translation.
+ */
+ if (*tlb_size < TARGET_PAGE_SIZE) {
+ *tlb_size = 1;
+ }
+
return true;
}