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authorAlistair Francis <alistair.francis@wdc.com>2020-01-31 17:02:15 -0800
committerPalmer Dabbelt <palmerdabbelt@google.com>2020-02-27 13:45:36 -0800
commit713d8363deb3774db14fb88a9fcd99687dcef114 (patch)
treec57f5eb6ea5aebcba1cf9ac9c17b1b2b0ce22078 /target/riscv
parent66e594f2800ddc55f908830bf9e8dc4cda1304fe (diff)
target/riscv: Set VS bits in mideleg for Hyp extension
Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Palmer Dabbelt <palmerdabbelt@google.com> Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
Diffstat (limited to 'target/riscv')
-rw-r--r--target/riscv/csr.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/target/riscv/csr.c b/target/riscv/csr.c
index f7333286bd..c0e942684d 100644
--- a/target/riscv/csr.c
+++ b/target/riscv/csr.c
@@ -448,6 +448,9 @@ static int read_mideleg(CPURISCVState *env, int csrno, target_ulong *val)
static int write_mideleg(CPURISCVState *env, int csrno, target_ulong val)
{
env->mideleg = (env->mideleg & ~delegable_ints) | (val & delegable_ints);
+ if (riscv_has_ext(env, RVH)) {
+ env->mideleg |= VS_MODE_INTERRUPTS;
+ }
return 0;
}