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authorWeiwei Li <liweiwei@iscas.ac.cn>2023-12-07 15:32:30 +0000
committerAlistair Francis <alistair.francis@wdc.com>2024-01-10 18:47:47 +1000
commitb52d49e97fc458f90c2e2f8ee79a20208d68682f (patch)
tree9320988e23d6eaa1022aff1127ced42c23d09a5a /target/riscv/translate.c
parentca334e10dcd1f0f3a3c08f8dc3f9945d574d0e6b (diff)
target/riscv: Add support for Zacas extension
Add support for amocas.w/d/q instructions which are part of the ratified Zacas extension: https://github.com/riscv/riscv-zacas Signed-off-by: Weiwei Li <liweiwei@iscas.ac.cn> Signed-off-by: Junqiang Wang <wangjunqiang@iscas.ac.cn> Signed-off-by: Rob Bradford <rbradford@rivosinc.com> Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Message-ID: <20231207153842.32401-2-rbradford@rivosinc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'target/riscv/translate.c')
-rw-r--r--target/riscv/translate.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/target/riscv/translate.c b/target/riscv/translate.c
index f0be79bb16..071fbad7ef 100644
--- a/target/riscv/translate.c
+++ b/target/riscv/translate.c
@@ -1089,6 +1089,7 @@ static uint32_t opcode_at(DisasContextBase *dcbase, target_ulong pc)
#include "insn_trans/trans_rvv.c.inc"
#include "insn_trans/trans_rvb.c.inc"
#include "insn_trans/trans_rvzicond.c.inc"
+#include "insn_trans/trans_rvzacas.c.inc"
#include "insn_trans/trans_rvzawrs.c.inc"
#include "insn_trans/trans_rvzicbo.c.inc"
#include "insn_trans/trans_rvzfa.c.inc"