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| author | Richard Henderson <richard.henderson@linaro.org> | 2023-06-02 14:14:04 -0700 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2023-07-09 13:47:17 +0100 |
| commit | 274f33765af36b5c7447adec18b61125f05b7b83 (patch) | |
| tree | 7571c5e81061a5626b8d1f126f5fc53a8cfb4617 /target/riscv/crypto_helper.c | |
| parent | 607a5f9d624fdd63d0b7f0e640f7a8d21213b8df (diff) | |
target/riscv: Use aesenc_SB_SR_MC_AK
This implements the AES64ESM instruction.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'target/riscv/crypto_helper.c')
| -rw-r--r-- | target/riscv/crypto_helper.c | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/target/riscv/crypto_helper.c b/target/riscv/crypto_helper.c index 505166ce5a..c036fe8632 100644 --- a/target/riscv/crypto_helper.c +++ b/target/riscv/crypto_helper.c @@ -198,7 +198,12 @@ static inline target_ulong aes64_operation(target_ulong rs1, target_ulong rs2, target_ulong HELPER(aes64esm)(target_ulong rs1, target_ulong rs2) { - return aes64_operation(rs1, rs2, true, true); + AESState t; + + t.d[HOST_BIG_ENDIAN] = rs1; + t.d[!HOST_BIG_ENDIAN] = rs2; + aesenc_SB_SR_MC_AK(&t, &t, &aes_zero, false); + return t.d[HOST_BIG_ENDIAN]; } target_ulong HELPER(aes64es)(target_ulong rs1, target_ulong rs2) |