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author | Palmer Dabbelt <palmer@sifive.com> | 2019-10-08 13:51:50 -0700 |
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committer | Palmer Dabbelt <palmer@sifive.com> | 2019-10-28 07:47:27 -0700 |
commit | aacb578fad214383e6803cba35d6e1bce71f4a3f (patch) | |
tree | 3244f44dccddb88576e4ea72003b92124baf17ba /target/riscv/cpu.h | |
parent | e6e03dcffd3583f6fd8148108e65d514b8382c2c (diff) |
RISC-V: Handle bus errors in the page table walker
We directly access physical memory while walking the page tables on
RISC-V, but while doing so we were using cpu_ld*() which does not report
bus errors. This patch converts the page table walker over to use
address_space_ld*(), which allows bus errors to be detected.
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
Diffstat (limited to 'target/riscv/cpu.h')
0 files changed, 0 insertions, 0 deletions