aboutsummaryrefslogtreecommitdiff
path: root/target/riscv/cpu.h
diff options
context:
space:
mode:
authorPeter Maydell <peter.maydell@linaro.org>2022-11-24 11:50:17 +0000
committerPeter Maydell <peter.maydell@linaro.org>2022-12-16 15:58:15 +0000
commit4fa485a78e7e887afccdd183602cfb117cf05659 (patch)
tree84802a9492b3784bc433314447925e779557fd8e /target/riscv/cpu.h
parenta1c5d644b77b9e5c2639e7c7a6257398d72fc81d (diff)
target/riscv: Convert to 3-phase reset
Convert the riscv CPU class to use 3-phase reset, so it doesn't need to use device_class_set_parent_reset() any more. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Edgar E. Iglesias <edgar@zeroasic.com> Reviewed-by: Taylor Simpson <tsimpson@quicinc.com> Reviewed-by: Greg Kurz <groug@kaod.org> Message-id: 20221124115023.2437291-15-peter.maydell@linaro.org
Diffstat (limited to 'target/riscv/cpu.h')
-rw-r--r--target/riscv/cpu.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h
index 3a9e25053f..443d15a47c 100644
--- a/target/riscv/cpu.h
+++ b/target/riscv/cpu.h
@@ -395,7 +395,7 @@ OBJECT_DECLARE_CPU_TYPE(RISCVCPU, RISCVCPUClass, RISCV_CPU)
/**
* RISCVCPUClass:
* @parent_realize: The parent class' realize handler.
- * @parent_reset: The parent class' reset handler.
+ * @parent_phases: The parent class' reset phase handlers.
*
* A RISCV CPU model.
*/
@@ -404,7 +404,7 @@ struct RISCVCPUClass {
CPUClass parent_class;
/*< public >*/
DeviceRealize parent_realize;
- DeviceReset parent_reset;
+ ResettablePhases parent_phases;
};
struct RISCVCPUConfig {