diff options
| author | Richard Henderson <richard.henderson@linaro.org> | 2023-09-13 17:22:49 -0700 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2023-10-04 11:03:54 -0700 |
| commit | b77af26e973705e8fd96cff102fc978ee44043da (patch) | |
| tree | 5da84b6520fbcf44ef8d9af06307785744eef835 /target/ppc | |
| parent | ad75a51e84af9638e4ec51aa1e6ec5f3ff642558 (diff) | |
accel/tcg: Replace CPUState.env_ptr with cpu_env()
Reviewed-by: Anton Johansson <anjo@rev.ng>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'target/ppc')
| -rw-r--r-- | target/ppc/excp_helper.c | 10 | ||||
| -rw-r--r-- | target/ppc/translate.c | 4 |
2 files changed, 7 insertions, 7 deletions
diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c index 99099cb1f6..7926114d5c 100644 --- a/target/ppc/excp_helper.c +++ b/target/ppc/excp_helper.c @@ -3189,7 +3189,7 @@ void ppc_cpu_do_unaligned_access(CPUState *cs, vaddr vaddr, MMUAccessType access_type, int mmu_idx, uintptr_t retaddr) { - CPUPPCState *env = cs->env_ptr; + CPUPPCState *env = cpu_env(cs); uint32_t insn; /* Restore state and reload the insn we executed, for filling in DSISR. */ @@ -3220,7 +3220,7 @@ void ppc_cpu_do_transaction_failed(CPUState *cs, hwaddr physaddr, int mmu_idx, MemTxAttrs attrs, MemTxResult response, uintptr_t retaddr) { - CPUPPCState *env = cs->env_ptr; + CPUPPCState *env = cpu_env(cs); switch (env->excp_model) { #if defined(TARGET_PPC64) @@ -3264,7 +3264,7 @@ void ppc_cpu_do_transaction_failed(CPUState *cs, hwaddr physaddr, void ppc_cpu_debug_excp_handler(CPUState *cs) { #if defined(TARGET_PPC64) - CPUPPCState *env = cs->env_ptr; + CPUPPCState *env = cpu_env(cs); if (env->insns_flags2 & PPC2_ISA207S) { if (cs->watchpoint_hit) { @@ -3286,7 +3286,7 @@ void ppc_cpu_debug_excp_handler(CPUState *cs) bool ppc_cpu_debug_check_breakpoint(CPUState *cs) { #if defined(TARGET_PPC64) - CPUPPCState *env = cs->env_ptr; + CPUPPCState *env = cpu_env(cs); if (env->insns_flags2 & PPC2_ISA207S) { target_ulong priv; @@ -3313,7 +3313,7 @@ bool ppc_cpu_debug_check_breakpoint(CPUState *cs) bool ppc_cpu_debug_check_watchpoint(CPUState *cs, CPUWatchpoint *wp) { #if defined(TARGET_PPC64) - CPUPPCState *env = cs->env_ptr; + CPUPPCState *env = cpu_env(cs); if (env->insns_flags2 & PPC2_ISA207S) { if (wp == env->dawr0_watchpoint) { diff --git a/target/ppc/translate.c b/target/ppc/translate.c index e20a1bea62..329da4d518 100644 --- a/target/ppc/translate.c +++ b/target/ppc/translate.c @@ -7320,7 +7320,7 @@ static bool decode_legacy(PowerPCCPU *cpu, DisasContext *ctx, uint32_t insn) static void ppc_tr_init_disas_context(DisasContextBase *dcbase, CPUState *cs) { DisasContext *ctx = container_of(dcbase, DisasContext, base); - CPUPPCState *env = cs->env_ptr; + CPUPPCState *env = cpu_env(cs); uint32_t hflags = ctx->base.tb->flags; ctx->spr_cb = env->spr_cb; @@ -7384,7 +7384,7 @@ static void ppc_tr_translate_insn(DisasContextBase *dcbase, CPUState *cs) { DisasContext *ctx = container_of(dcbase, DisasContext, base); PowerPCCPU *cpu = POWERPC_CPU(cs); - CPUPPCState *env = cs->env_ptr; + CPUPPCState *env = cpu_env(cs); target_ulong pc; uint32_t insn; bool ok; |