diff options
| author | Bharata B Rao <bharata@linux.vnet.ibm.com> | 2017-01-06 11:44:47 +0530 |
|---|---|---|
| committer | David Gibson <david@gibson.dropbear.id.au> | 2017-01-31 10:10:14 +1100 |
| commit | ffc67420f9d96fd30a6b51ee0d3e19a067750bc0 (patch) | |
| tree | 8ebdf70af5bafb23895b4d0d3df2de73d51b13d7 /target/ppc/translate | |
| parent | 5dc22bf58184a8da41e5d346570665fc99c0ca5f (diff) | |
target-ppc: Rename helper_compute_fprf to helper_compute_fprf_float64
Since helper_compute_fprf() works on float64 argument, rename it
to helper_compute_fprf_float64(). Also use a macro to generate
helper_compute_fprf_float64() so that float128 version of the same
helper can be introduced easily later.
Signed-off-by: Bharata B Rao <bharata@linux.vnet.ibm.com>
Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'target/ppc/translate')
| -rw-r--r-- | target/ppc/translate/fp-impl.inc.c | 20 |
1 files changed, 10 insertions, 10 deletions
diff --git a/target/ppc/translate/fp-impl.inc.c b/target/ppc/translate/fp-impl.inc.c index 872af7b56f..2fbd4d4f38 100644 --- a/target/ppc/translate/fp-impl.inc.c +++ b/target/ppc/translate/fp-impl.inc.c @@ -9,9 +9,9 @@ static inline void gen_reset_fpstatus(void) gen_helper_reset_fpstatus(cpu_env); } -static inline void gen_compute_fprf(TCGv_i64 arg) +static inline void gen_compute_fprf_float64(TCGv_i64 arg) { - gen_helper_compute_fprf(cpu_env, arg); + gen_helper_compute_fprf_float64(cpu_env, arg); gen_helper_float_check_status(cpu_env); } @@ -47,7 +47,7 @@ static void gen_f##name(DisasContext *ctx) \ cpu_fpr[rD(ctx->opcode)]); \ } \ if (set_fprf) { \ - gen_compute_fprf(cpu_fpr[rD(ctx->opcode)]); \ + gen_compute_fprf_float64(cpu_fpr[rD(ctx->opcode)]); \ } \ if (unlikely(Rc(ctx->opcode) != 0)) { \ gen_set_cr1_from_fpscr(ctx); \ @@ -74,7 +74,7 @@ static void gen_f##name(DisasContext *ctx) \ cpu_fpr[rD(ctx->opcode)]); \ } \ if (set_fprf) { \ - gen_compute_fprf(cpu_fpr[rD(ctx->opcode)]); \ + gen_compute_fprf_float64(cpu_fpr[rD(ctx->opcode)]); \ } \ if (unlikely(Rc(ctx->opcode) != 0)) { \ gen_set_cr1_from_fpscr(ctx); \ @@ -100,7 +100,7 @@ static void gen_f##name(DisasContext *ctx) \ cpu_fpr[rD(ctx->opcode)]); \ } \ if (set_fprf) { \ - gen_compute_fprf(cpu_fpr[rD(ctx->opcode)]); \ + gen_compute_fprf_float64(cpu_fpr[rD(ctx->opcode)]); \ } \ if (unlikely(Rc(ctx->opcode) != 0)) { \ gen_set_cr1_from_fpscr(ctx); \ @@ -121,7 +121,7 @@ static void gen_f##name(DisasContext *ctx) \ gen_helper_f##name(cpu_fpr[rD(ctx->opcode)], cpu_env, \ cpu_fpr[rB(ctx->opcode)]); \ if (set_fprf) { \ - gen_compute_fprf(cpu_fpr[rD(ctx->opcode)]); \ + gen_compute_fprf_float64(cpu_fpr[rD(ctx->opcode)]); \ } \ if (unlikely(Rc(ctx->opcode) != 0)) { \ gen_set_cr1_from_fpscr(ctx); \ @@ -139,7 +139,7 @@ static void gen_f##name(DisasContext *ctx) \ gen_helper_f##name(cpu_fpr[rD(ctx->opcode)], cpu_env, \ cpu_fpr[rB(ctx->opcode)]); \ if (set_fprf) { \ - gen_compute_fprf(cpu_fpr[rD(ctx->opcode)]); \ + gen_compute_fprf_float64(cpu_fpr[rD(ctx->opcode)]); \ } \ if (unlikely(Rc(ctx->opcode) != 0)) { \ gen_set_cr1_from_fpscr(ctx); \ @@ -174,7 +174,7 @@ static void gen_frsqrtes(DisasContext *ctx) cpu_fpr[rB(ctx->opcode)]); gen_helper_frsp(cpu_fpr[rD(ctx->opcode)], cpu_env, cpu_fpr[rD(ctx->opcode)]); - gen_compute_fprf(cpu_fpr[rD(ctx->opcode)]); + gen_compute_fprf_float64(cpu_fpr[rD(ctx->opcode)]); if (unlikely(Rc(ctx->opcode) != 0)) { gen_set_cr1_from_fpscr(ctx); } @@ -196,7 +196,7 @@ static void gen_fsqrt(DisasContext *ctx) gen_reset_fpstatus(); gen_helper_fsqrt(cpu_fpr[rD(ctx->opcode)], cpu_env, cpu_fpr[rB(ctx->opcode)]); - gen_compute_fprf(cpu_fpr[rD(ctx->opcode)]); + gen_compute_fprf_float64(cpu_fpr[rD(ctx->opcode)]); if (unlikely(Rc(ctx->opcode) != 0)) { gen_set_cr1_from_fpscr(ctx); } @@ -213,7 +213,7 @@ static void gen_fsqrts(DisasContext *ctx) cpu_fpr[rB(ctx->opcode)]); gen_helper_frsp(cpu_fpr[rD(ctx->opcode)], cpu_env, cpu_fpr[rD(ctx->opcode)]); - gen_compute_fprf(cpu_fpr[rD(ctx->opcode)]); + gen_compute_fprf_float64(cpu_fpr[rD(ctx->opcode)]); if (unlikely(Rc(ctx->opcode) != 0)) { gen_set_cr1_from_fpscr(ctx); } |