diff options
author | Daniel Henrique Barboza <danielhb413@gmail.com> | 2022-03-02 06:51:36 +0100 |
---|---|---|
committer | Cédric Le Goater <clg@kaod.org> | 2022-03-02 06:51:36 +0100 |
commit | d3412df20a321f2c4d98f5759cef2441206d5bd8 (patch) | |
tree | b8939d6121c3a781872db9ca186f5251e2c4de48 /target/ppc/power8-pmu.c | |
parent | cb76bbc43fda5b2540f438f849e7583293ab3569 (diff) |
target/ppc: trigger PERFM EBBs from power8-pmu.c
This patch adds the EBB exception support that are triggered by
Performance Monitor alerts. This happens when a Performance Monitor
alert occurs and MMCR0_EBE, BESCR_PME and BESCR_GE are set.
fire_PMC_interrupt() will execute the raise_ebb_perfm_exception() helper
which will check for MMCR0_EBE, BESCR_PME and BESCR_GE bits. If all bits
are set, do_ebb() will attempt to trigger a PERFM EBB event.
If the EBB facility is enabled in both FSCR and HFSCR we consider that
the EBB is valid and set BESCR_PMEO. After that, if we're running in
problem state, fire a POWERPC_EXCP_PERM_EBB immediately. Otherwise we'll
queue a PPC_INTERRUPT_EBB.
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220225101140.1054160-5-danielhb413@gmail.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Diffstat (limited to 'target/ppc/power8-pmu.c')
-rw-r--r-- | target/ppc/power8-pmu.c | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/target/ppc/power8-pmu.c b/target/ppc/power8-pmu.c index d245663158..beeab5c494 100644 --- a/target/ppc/power8-pmu.c +++ b/target/ppc/power8-pmu.c @@ -307,8 +307,7 @@ static void fire_PMC_interrupt(PowerPCCPU *cpu) env->spr[SPR_POWER_MMCR0] |= MMCR0_PMAO; } - /* PMC interrupt not implemented yet */ - return; + raise_ebb_perfm_exception(env); } /* This helper assumes that the PMC is running. */ |