diff options
| author | Aaron Larson <alarson@ddci.com> | 2017-06-21 17:03:08 -0700 |
|---|---|---|
| committer | David Gibson <david@gibson.dropbear.id.au> | 2017-07-11 11:04:01 +1000 |
| commit | 0ee604abce61ab091b00ced40610866e02f55790 (patch) | |
| tree | e089f2a2f2ae48eec3fe6d2545042132d042bf12 /target/ppc/excp_helper.c | |
| parent | e806b4db1477a1c6bfda7bba28c7f26c47f18e1e (diff) | |
target-ppc: SPR_BOOKE_ESR not set on FP exceptions
Properly set the book E exception syndrome register when a floating
point exception occurs.
Currently on a book E processor, the POWERPC_EXCP_FP exception handler
fails to set "env->spr[SPR_BOOKE_ESR] = ESR_FP;" as required by the
book E specification.
Signed-off-by: Aaron Larson <alarson@ddci.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'target/ppc/excp_helper.c')
| -rw-r--r-- | target/ppc/excp_helper.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c index 3a9f0861e7..e6009e70e5 100644 --- a/target/ppc/excp_helper.c +++ b/target/ppc/excp_helper.c @@ -283,6 +283,7 @@ static inline void powerpc_excp(PowerPCCPU *cpu, int excp_model, int excp) * precise in the MSR. */ msr |= 0x00100000; + env->spr[SPR_BOOKE_ESR] = ESR_FP; break; case POWERPC_EXCP_INVAL: LOG_EXCP("Invalid instruction at " TARGET_FMT_lx "\n", env->nip); |