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authorRichard Henderson <richard.henderson@linaro.org>2020-09-04 11:11:28 -0700
committerRichard Henderson <richard.henderson@linaro.org>2020-09-07 12:58:08 -0700
commita4bcfc3380c7fab42613dc5747d4b48f0bae29df (patch)
treedcc85f1c62ec15d01d7308b3f994d77aaed2ca03 /target/microblaze/op_helper.c
parenta0b2d16a09374464450c47f280fc10df70a5de72 (diff)
target/microblaze: Move pvr regs to MicroBlazeCPUConfig
These values are constant, and are derived from the other configuration knobs. Move them into MicroBlazeCPUConfig to emphasize that they are not variable. Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'target/microblaze/op_helper.c')
-rw-r--r--target/microblaze/op_helper.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/target/microblaze/op_helper.c b/target/microblaze/op_helper.c
index 4614e99db3..757f3ff04b 100644
--- a/target/microblaze/op_helper.c
+++ b/target/microblaze/op_helper.c
@@ -134,7 +134,7 @@ static void update_fpu_flags(CPUMBState *env, int flags, uintptr_t ra)
raise = 1;
}
if (raise
- && (env->pvr.regs[2] & PVR2_FPU_EXC_MASK)
+ && (env_archcpu(env)->cfg.pvr_regs[2] & PVR2_FPU_EXC_MASK)
&& (env->msr & MSR_EE)) {
raise_fpu_exception(env, ra);
}