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authorPaolo Bonzini <pbonzini@redhat.com>2022-09-05 15:39:36 +0200
committerPaolo Bonzini <pbonzini@redhat.com>2022-10-18 13:58:04 +0200
commit1d0efbdb35f619db9178e862742335d7c472c1a4 (patch)
treeab5de177881a20b3aa978471084713ec818c137a /target/i386/tcg/translate.c
parent92ec056a6b2fc5d5a5593121c5d9475d2a2461d6 (diff)
target/i386: reimplement 0x0f 0xd8-0xdf, 0xe8-0xef, 0xf8-0xff, add AVX
These are more simple integer instructions present in both MMX and SSE/AVX, with no holes that were later occupied by newer instructions. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to 'target/i386/tcg/translate.c')
-rw-r--r--target/i386/tcg/translate.c4
1 files changed, 3 insertions, 1 deletions
diff --git a/target/i386/tcg/translate.c b/target/i386/tcg/translate.c
index 5133b8c23d..ff5c4bbb56 100644
--- a/target/i386/tcg/translate.c
+++ b/target/i386/tcg/translate.c
@@ -4781,7 +4781,9 @@ static bool disas_insn(DisasContext *s, CPUState *cpu)
#ifndef CONFIG_USER_ONLY
use_new &= b <= limit;
#endif
- if (use_new && (b >= 0x160 && b <= 0x16f)) {
+ if (use_new &&
+ ((b >= 0x160 && b <= 0x16f) ||
+ (b >= 0x1d8 && b <= 0x1ff && (b & 8)))) {
disas_insn_new(s, cpu, b + 0x100);
return s->pc;
}