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authorTaylor Simpson <tsimpson@quicinc.com>2022-02-09 18:15:46 -0800
committerTaylor Simpson <tsimpson@quicinc.com>2022-03-12 09:14:22 -0800
commit5b0043c67ccd7b88e0858204e79b09448adf4b34 (patch)
tree8f6b45457687ddd50123a91cc482b69bed634e6c /target/hexagon
parent58ff2981667262f77d57219fc9cef2a43a740159 (diff)
Hexagon HVX (target/hexagon) fix bug in HVX saturate instructions
Two tests added to tests/tcg/hexagon/hvx_misc.c v21.uw = vadd(v11.uw, v10.uw):sat v25:24.uw = vsub(v17:16.uw, v27:26.uw):sat Signed-off-by: Taylor Simpson <tsimpson@quicinc.com> Message-Id: <20220210021556.9217-3-tsimpson@quicinc.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'target/hexagon')
-rw-r--r--target/hexagon/macros.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/target/hexagon/macros.h b/target/hexagon/macros.h
index 19d103cad5..a78e84faa4 100644
--- a/target/hexagon/macros.h
+++ b/target/hexagon/macros.h
@@ -1,5 +1,5 @@
/*
- * Copyright(c) 2019-2021 Qualcomm Innovation Center, Inc. All Rights Reserved.
+ * Copyright(c) 2019-2022 Qualcomm Innovation Center, Inc. All Rights Reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -268,7 +268,7 @@ static inline void gen_pred_cancel(TCGv pred, int slot_num)
#define fVSATUVALN(N, VAL) \
({ \
- (((int)(VAL)) < 0) ? 0 : ((1LL << (N)) - 1); \
+ (((int64_t)(VAL)) < 0) ? 0 : ((1LL << (N)) - 1); \
})
#define fSATUVALN(N, VAL) \
({ \