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author | Taylor Simpson <tsimpson@quicinc.com> | 2022-11-08 08:29:05 -0800 |
---|---|---|
committer | Taylor Simpson <tsimpson@quicinc.com> | 2022-12-16 10:10:28 -0800 |
commit | 1b9a7f2a1384d14dbb82862a612188797d398fe0 (patch) | |
tree | 1444ade5f224aa1813a170fa38d4031cbce84643 /target/hexagon/translate.h | |
parent | 97b16faf82c463a58c68d7221c1330c84878f48a (diff) |
Hexagon (target/hexagon) Use direct block chaining for direct jump/branch
Direct block chaining is documented here
https://qemu.readthedocs.io/en/latest/devel/tcg.html#direct-block-chaining
Recall that Hexagon allows packets with multiple jumps where only the
first one with a true predicate will actually jump. We can use
tcg_gen_goto_tb/tcg_gen_exit_tb when the packet contains a single
PC-relative branch or jump. If not, we use tcg_gen_lookup_and_goto_ptr.
We add the following to DisasContext in order to delay the branching
until the end of packet commit (in gen_end_tb)
branch_cond
The TCGCond condition under which the branch is taken
When branch_cond == TCG_COND_NEVER, there isn't a single
direct branch in this packet.
When branch_cond != TCG_COND_ALWAYS, the value is in
hex_branch_taken
branch_dest
The destination of the branch
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
Message-Id: <20221108162906.3166-11-tsimpson@quicinc.com>
Diffstat (limited to 'target/hexagon/translate.h')
-rw-r--r-- | target/hexagon/translate.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/target/hexagon/translate.h b/target/hexagon/translate.h index 96509a4da7..aacf0b0921 100644 --- a/target/hexagon/translate.h +++ b/target/hexagon/translate.h @@ -57,6 +57,8 @@ typedef struct DisasContext { bool qreg_is_predicated[NUM_QREGS]; int qreg_log_idx; bool pre_commit; + TCGCond branch_cond; + target_ulong branch_dest; } DisasContext; static inline void ctx_log_reg_write(DisasContext *ctx, int rnum) |