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authorTaylor Simpson <tsimpson@quicinc.com>2021-06-01 18:19:42 -0500
committerTaylor Simpson <tsimpson@quicinc.com>2021-06-29 11:32:50 -0500
commita5a8d98c8537f022a14bdc70eff12e296431b80f (patch)
tree759129c7276b82b3e42b54a078c552366d4b7478 /target/hexagon/gen_tcg.h
parent07c0f65385b94bbc8efc398ff82edd05953e39c2 (diff)
Hexagon (target/hexagon) fix l2fetch instructions
Y4_l2fetch == l2fetch(Rs32, Rt32) Y5_l2fetch == l2fetch(Rs32, Rtt32) The semantics for these instructions are present, but the encodings are missing. Note that these are treated as nops in qemu, so we add overrides. Test case added to tests/tcg/hexagon/misc.c Signed-off-by: Taylor Simpson <tsimpson@quicinc.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <1622589584-22571-3-git-send-email-tsimpson@quicinc.com>
Diffstat (limited to 'target/hexagon/gen_tcg.h')
-rw-r--r--target/hexagon/gen_tcg.h11
1 files changed, 11 insertions, 0 deletions
diff --git a/target/hexagon/gen_tcg.h b/target/hexagon/gen_tcg.h
index 18fcdbc7e4..a375d6a7c5 100644
--- a/target/hexagon/gen_tcg.h
+++ b/target/hexagon/gen_tcg.h
@@ -734,4 +734,15 @@
#define fGEN_TCG_F2_dfmpyhh(SHORTCODE) \
gen_helper_dfmpyhh(RxxV, cpu_env, RxxV, RssV, RttV)
+/* Nothing to do for these in qemu, need to suppress compiler warnings */
+#define fGEN_TCG_Y4_l2fetch(SHORTCODE) \
+ do { \
+ RsV = RsV; \
+ RtV = RtV; \
+ } while (0)
+#define fGEN_TCG_Y5_l2fetch(SHORTCODE) \
+ do { \
+ RsV = RsV; \
+ } while (0)
+
#endif