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authorPhilippe Mathieu-Daudé <f4bug@amsat.org>2022-02-07 13:35:58 +0100
committerPhilippe Mathieu-Daudé <f4bug@amsat.org>2022-03-06 22:23:09 +0100
commit1ea4a06af0f6578e5d0ddcea148503290b1c4907 (patch)
tree060b35cfbdf984ec058efb07d1815283b1058dd0 /target/cris
parent36861198754af7577c73cdb19e1e385c933bfdc8 (diff)
target: Use CPUArchState as interface to target-specific CPU state
While CPUState is our interface with generic code, CPUArchState is our interface with target-specific code. Use CPUArchState as an abstract type, defined by each target. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20220214183144.27402-13-f4bug@amsat.org>
Diffstat (limited to 'target/cris')
-rw-r--r--target/cris/cpu.h3
1 files changed, 1 insertions, 2 deletions
diff --git a/target/cris/cpu.h b/target/cris/cpu.h
index b445b194ea..763d4f882e 100644
--- a/target/cris/cpu.h
+++ b/target/cris/cpu.h
@@ -105,7 +105,7 @@ typedef struct {
uint32_t lo;
} TLBSet;
-typedef struct CPUCRISState {
+typedef struct CPUArchState {
uint32_t regs[16];
/* P0 - P15 are referred to as special registers in the docs. */
uint32_t pregs[16];
@@ -265,7 +265,6 @@ static inline int cpu_mmu_index (CPUCRISState *env, bool ifetch)
#define SFR_RW_MM_TLB_LO env->pregs[PR_SRS]][5
#define SFR_RW_MM_TLB_HI env->pregs[PR_SRS]][6
-typedef CPUCRISState CPUArchState;
typedef CRISCPU ArchCPU;
#include "exec/cpu-all.h"