diff options
author | Richard Henderson <rth@twiddle.net> | 2017-06-14 12:39:54 -0700 |
---|---|---|
committer | Richard Henderson <rth@twiddle.net> | 2017-06-19 11:11:26 -0700 |
commit | 8da54b2507c1cabf60c2de904cf0383b23239231 (patch) | |
tree | dbd6d82b6bd18e2598ef48bb37f6965cadc22db6 /target/arm | |
parent | 542f70c22edd22367373b4cb34d3c478f1ac7c0f (diff) |
target/arm: Exit after clearing aarch64 interrupt mask
Exit to cpu loop so we reevaluate cpu_arm_hw_interrupts.
Tested-by: Emilio G. Cota <cota@braap.org>
Tested-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Emilio G. Cota <cota@braap.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Diffstat (limited to 'target/arm')
-rw-r--r-- | target/arm/translate-a64.c | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index 860e279658..e55547d95d 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -1422,7 +1422,9 @@ static void handle_msr_i(DisasContext *s, uint32_t insn, gen_helper_msr_i_pstate(cpu_env, tcg_op, tcg_imm); tcg_temp_free_i32(tcg_imm); tcg_temp_free_i32(tcg_op); - s->is_jmp = DISAS_UPDATE; + /* For DAIFClear, exit the cpu loop to re-evaluate pending IRQs. */ + gen_a64_set_pc_im(s->pc); + s->is_jmp = (op == 0x1f ? DISAS_EXIT : DISAS_JUMP); break; } default: @@ -11369,6 +11371,9 @@ void gen_intermediate_code_a64(ARMCPU *cpu, TranslationBlock *tb) case DISAS_JUMP: tcg_gen_lookup_and_goto_ptr(cpu_pc); break; + case DISAS_EXIT: + tcg_gen_exit_tb(0); + break; case DISAS_TB_JUMP: case DISAS_EXC: case DISAS_SWI: |