diff options
| author | Richard Henderson <richard.henderson@linaro.org> | 2021-05-25 15:58:17 -0700 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2021-06-03 16:43:26 +0100 |
| commit | 3c93dfa42c394fdd55684f2fbf24cf2f39b97d47 (patch) | |
| tree | cc7e22448f0e02d4bcc9d28a424670843d51506a /target/arm/cpu_tcg.c | |
| parent | 6c47a9053cc2255ec444e0f964abd496fdce6433 (diff) | |
target/arm: Enable BFloat16 extensions
Disable BF16 again for !have_neon and !have_vfp during realize.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210525225817.400336-13-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target/arm/cpu_tcg.c')
| -rw-r--r-- | target/arm/cpu_tcg.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/target/arm/cpu_tcg.c b/target/arm/cpu_tcg.c index 2e0e508f0e..d2d97115ea 100644 --- a/target/arm/cpu_tcg.c +++ b/target/arm/cpu_tcg.c @@ -968,6 +968,7 @@ static void arm_max_initfn(Object *obj) t = FIELD_DP32(t, ID_ISAR6, FHM, 1); t = FIELD_DP32(t, ID_ISAR6, SB, 1); t = FIELD_DP32(t, ID_ISAR6, SPECRES, 1); + t = FIELD_DP32(t, ID_ISAR6, BF16, 1); t = FIELD_DP32(t, ID_ISAR6, I8MM, 1); cpu->isar.id_isar6 = t; |