diff options
| author | Richard Henderson <richard.henderson@linaro.org> | 2019-03-01 12:05:01 -0800 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2019-03-05 15:55:08 +0000 |
| commit | 6bea25631af92531027d3bf3ef972a4d51d62e7c (patch) | |
| tree | 6e96b2d196e65937aa3065c2ead1aeb4de3007df /target/arm/cpu.h | |
| parent | 0e4db23d1fdbfed4fc1ec19b6e59820209600358 (diff) | |
target/arm: Implement ARMv8.5-FRINT
Tested-by: Laurent Desnogues <laurent.desnogues@gmail.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20190301200501.16533-11-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target/arm/cpu.h')
| -rw-r--r-- | target/arm/cpu.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/target/arm/cpu.h b/target/arm/cpu.h index a7aaec63d7..5f23c62132 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -3476,6 +3476,11 @@ static inline bool isar_feature_aa64_predinv(const ARMISARegisters *id) return FIELD_EX64(id->id_aa64isar1, ID_AA64ISAR1, SPECRES) != 0; } +static inline bool isar_feature_aa64_frint(const ARMISARegisters *id) +{ + return FIELD_EX64(id->id_aa64isar1, ID_AA64ISAR1, FRINTTS) != 0; +} + static inline bool isar_feature_aa64_fp16(const ARMISARegisters *id) { /* We always set the AdvSIMD and FP fields identically wrt FP16. */ |