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| author | Max Filippov <jcmvbkbc@gmail.com> | 2012-01-13 09:21:32 +0400 |
|---|---|---|
| committer | Max Filippov <jcmvbkbc@gmail.com> | 2012-02-18 14:55:51 +0400 |
| commit | e61dc8f72c096e084106d5e97101d9d88f642d0e (patch) | |
| tree | 9f1040d377372c4771d9f061bd163fac5ea7e41b /target-xtensa/core-fsf | |
| parent | ab58c5b4fd07fbe94950ff459ef51d43cfb5b8c8 (diff) | |
target-xtensa: implement instruction breakpoints
Add IBREAKA/IBREAKENABLE SRs and implement debug exception, BREAK and
BREAK.N instructions and IBREAK breakpoints.
IBREAK breakpoint address is considered constant for TB lifetime.
On IBREAKA/IBREAKENABLE change corresponding TBs are invalidated.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Diffstat (limited to 'target-xtensa/core-fsf')
0 files changed, 0 insertions, 0 deletions