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authorAndreas Färber <afaerber@suse.de>2012-02-16 00:12:24 +0100
committerAndreas Färber <afaerber@suse.de>2012-03-14 22:20:24 +0100
commit15ecee74053afb3901e557d190d006451f6a0977 (patch)
tree7eb4a7c88fc41a017f544e5b01fccdd634430d3a /target-unicore32
parentcb15982158d62ea017f1ad584370176b586e1873 (diff)
target-unicore32: Rename to CPUUniCore32State
This aids in refactoring CPUState by adopting the common naming scheme. Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-by: Anthony Liguori <aliguori@us.ibm.com>
Diffstat (limited to 'target-unicore32')
-rw-r--r--target-unicore32/cpu.h8
1 files changed, 4 insertions, 4 deletions
diff --git a/target-unicore32/cpu.h b/target-unicore32/cpu.h
index f725634801..923db052c8 100644
--- a/target-unicore32/cpu.h
+++ b/target-unicore32/cpu.h
@@ -18,7 +18,7 @@
#define ELF_MACHINE EM_UNICORE32
-#define CPUState struct CPUState_UniCore32
+#define CPUState struct CPUUniCore32State
#include "config.h"
#include "qemu-common.h"
@@ -27,7 +27,7 @@
#define NB_MMU_MODES 2
-typedef struct CPUState_UniCore32 {
+typedef struct CPUUniCore32State {
/* Regs for current mode. */
uint32_t regs[32];
/* Frequently accessed ASR bits are stored separately for efficiently.
@@ -71,7 +71,7 @@ typedef struct CPUState_UniCore32 {
/* Internal CPU feature flags. */
uint32_t features;
-} CPUState_UniCore32;
+} CPUUniCore32State;
#define ASR_M (0x1f)
#define ASR_MODE_USER (0x10)
@@ -179,7 +179,7 @@ static inline void cpu_get_tb_cpu_state(CPUState *env, target_ulong *pc,
void uc32_translate_init(void);
void do_interrupt(CPUState *);
-void switch_mode(CPUState_UniCore32 *, int);
+void switch_mode(CPUUniCore32State *, int);
static inline bool cpu_has_work(CPUState *env)
{