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| author | Bastian Koppelmann <kbastian@mail.uni-paderborn.de> | 2015-01-17 22:34:27 +0000 |
|---|---|---|
| committer | Bastian Koppelmann <kbastian@mail.uni-paderborn.de> | 2015-01-26 19:56:45 +0000 |
| commit | 5f30046f156c181fb4088da2f4b8ea25a7d07c7a (patch) | |
| tree | 06a195fdd14cb87d1f0120a88ae38aca71bb6736 /target-tricore/op_helper.c | |
| parent | 452e3d49d871f311f7b884dc69160c3e0973b050 (diff) | |
target-tricore: Several translator and cpu model fixes
Fix tc1796 cpu model using wrong ISA version.
Fix cond_add sometimes writing back wrong result.
Fix RCR_SEL and RCR_SELN using wrong registers for result and cond.
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Diffstat (limited to 'target-tricore/op_helper.c')
| -rw-r--r-- | target-tricore/op_helper.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/target-tricore/op_helper.c b/target-tricore/op_helper.c index 57045490bb..ec2a0cc343 100644 --- a/target-tricore/op_helper.c +++ b/target-tricore/op_helper.c @@ -255,6 +255,7 @@ target_ulong helper_mul_suov(CPUTriCoreState *env, target_ulong r1, int64_t t1 = extract64(r1, 0, 32); int64_t t2 = extract64(r2, 0, 32); int64_t result = t1 * t2; + return suov32(env, result); } |