diff options
| author | Igor V. Kovalenko <igor.v.kovalenko@gmail.com> | 2010-05-22 14:52:24 +0400 |
|---|---|---|
| committer | Blue Swirl <blauwirbel@gmail.com> | 2010-05-22 12:48:52 +0000 |
| commit | 2aae2b8e0abd58e76d616bcbe93c6966d06d0188 (patch) | |
| tree | 8ecbfbb50171c80373d2aad69bd939cc0897ac3c /target-sparc/translate.c | |
| parent | b8e9fc0625c49404d63b4391f6dc5cf27be8b45b (diff) | |
sparc64: fix pstate privilege bits
- refactor code to handle hpstate only if available for current cpu
- conditionally set hypervisor bit in hpstate register
- reorder softmmu indices so user accessable ones go first, translation context
macros supervisor() and hypervisor() adjusted as well
- disable sparcv8 registers for TARGET_SPARC64
- fix cpu_mmu_index to use sparcv9 bits only
Signed-off-by: Igor V. Kovalenko <igor.v.kovalenko@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Diffstat (limited to 'target-sparc/translate.c')
| -rw-r--r-- | target-sparc/translate.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/target-sparc/translate.c b/target-sparc/translate.c index 8129b79d16..86096d2a4c 100644 --- a/target-sparc/translate.c +++ b/target-sparc/translate.c @@ -183,9 +183,9 @@ static void gen_op_store_QT0_fpr(unsigned int dst) #define hypervisor(dc) 0 #endif #else -#define supervisor(dc) (dc->mem_idx >= 1) +#define supervisor(dc) (dc->mem_idx >= MMU_KERNEL_IDX) #ifdef TARGET_SPARC64 -#define hypervisor(dc) (dc->mem_idx == 2) +#define hypervisor(dc) (dc->mem_idx == MMU_HYPV_IDX) #else #endif #endif |