diff options
| author | aurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-10-12 23:32:59 +0000 |
|---|---|---|
| committer | aurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-10-12 23:32:59 +0000 |
| commit | 7526aa2d0082558bc4e89dab9f7a37b0d509a71a (patch) | |
| tree | c281cfb50a185d0dfd2261aa25d75f759fe5a8e5 /target-sh4/translate.c | |
| parent | bdbf22e6b712adb6171a129efce67feece3a5b56 (diff) | |
SH4: Implement MOVUA.L
* target-sh4/translate.c (_decode_opc): Implement
MOVUA.L.
(Vladimir Prus)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5473 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-sh4/translate.c')
| -rw-r--r-- | target-sh4/translate.c | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/target-sh4/translate.c b/target-sh4/translate.c index 4972450dbe..0eeb294356 100644 --- a/target-sh4/translate.c +++ b/target-sh4/translate.c @@ -1515,6 +1515,17 @@ void _decode_opc(DisasContext * ctx) case 0x00c3: /* movca.l R0,@Rm */ tcg_gen_qemu_st32(REG(0), REG(B11_8), ctx->memidx); return; + case 0x40a9: + /* MOVUA.L @Rm,R0 (Rm) -> R0 + Load non-boundary-aligned data */ + tcg_gen_qemu_ld32u(REG(0), REG(B11_8), ctx->memidx); + return; + case 0x40e9: + /* MOVUA.L @Rm+,R0 (Rm) -> R0, Rm + 4 -> Rm + Load non-boundary-aligned data */ + tcg_gen_qemu_ld32u(REG(0), REG(B11_8), ctx->memidx); + tcg_gen_addi_i32(REG(B11_8), REG(B11_8), 4); + return; case 0x0029: /* movt Rn */ tcg_gen_andi_i32(REG(B11_8), cpu_sr, SR_T); return; |