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authorFabien Chouteau <chouteau@adacore.com>2013-03-19 07:41:53 +0000
committerAlexander Graf <agraf@suse.de>2013-03-22 15:28:46 +0100
commitd6478bc7e92db4669fac701d7bb8c51756b61d8a (patch)
tree61898f343ee12570cc85fee4216c61aa00456b32 /target-ppc
parent7b5651605836fd29572fd4c8769af5378d351712 (diff)
PPC/GDB: handle read and write of fpscr
Although the support of this register may be uncomplete, there are no reason to prevent the debugger from reading or writing it. Signed-off-by: Fabien Chouteau <chouteau@adacore.com> Signed-off-by: Alexander Graf <agraf@suse.de>
Diffstat (limited to 'target-ppc')
-rw-r--r--target-ppc/cpu.h2
-rw-r--r--target-ppc/fpu_helper.c5
-rw-r--r--target-ppc/translate_init.c2
3 files changed, 8 insertions, 1 deletions
diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h
index 6886666d6e..9b9c784366 100644
--- a/target-ppc/cpu.h
+++ b/target-ppc/cpu.h
@@ -1180,6 +1180,8 @@ void ppc_tlb_invalidate_one (CPUPPCState *env, target_ulong addr);
#endif
#endif
+void store_fpscr(CPUPPCState *env, uint64_t arg, uint32_t mask);
+
static inline uint64_t ppc_dump_gpr(CPUPPCState *env, int gprn)
{
uint64_t gprv;
diff --git a/target-ppc/fpu_helper.c b/target-ppc/fpu_helper.c
index 9d67926209..9e779eace6 100644
--- a/target-ppc/fpu_helper.c
+++ b/target-ppc/fpu_helper.c
@@ -463,6 +463,11 @@ void helper_store_fpscr(CPUPPCState *env, uint64_t arg, uint32_t mask)
fpscr_set_rounding_mode(env);
}
+void store_fpscr(CPUPPCState *env, uint64_t arg, uint32_t mask)
+{
+ helper_store_fpscr(env, arg, mask);
+}
+
void helper_float_check_status(CPUPPCState *env)
{
if (env->exception_index == POWERPC_EXCP_PROGRAM &&
diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c
index 15eebe9177..bd5033c415 100644
--- a/target-ppc/translate_init.c
+++ b/target-ppc/translate_init.c
@@ -7693,7 +7693,7 @@ static int gdb_set_float_reg(CPUPPCState *env, uint8_t *mem_buf, int n)
return 8;
}
if (n == 32) {
- /* FPSCR not implemented */
+ helper_store_fpscr(env, ldl_p(mem_buf), 0xffffffff);
return 4;
}
return 0;