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authorAurelien Jarno <aurelien@aurel32.net>2012-10-29 14:56:17 +0100
committerAurelien Jarno <aurelien@aurel32.net>2012-10-29 14:56:17 +0100
commitd262cb02861dd33375c08fc798930653b14769e9 (patch)
tree77eb67fff3bb5500bcc4dc09b14d2eab70335363 /target-ppc
parent3f4331bfd112840e94935b0fd098ee88c07beabc (diff)
parenta178274efabcbbc5d44805b51def874e47051325 (diff)
Merge branch 'ppc-for-upstream' of git://repo.or.cz/qemu/agraf
* 'ppc-for-upstream' of git://repo.or.cz/qemu/agraf: (22 commits) PPC: pseries: Remove hack for PIO window PPC: e500: Map PIO space into core memory region xen_platform: convert PIO to new memory api read/write vmport: convert PIO to new memory api read/write serial: convert PIO to new memory api read/write rtl8139: convert PIO to new memory api read/write pckbd: convert PIO to new memory api read/write pc port92: convert PIO to new memory api read/write mc146818rtc: convert PIO to new memory api read/write m48t59: convert PIO to new memory api read/write i8254: convert PIO to new memory api read/write es1370: convert PIO to new memory api read/write virtio-pci: convert PIO to new memory api read/write ac97: convert PIO to new memory api read/write pseries: Implement qemu initiated shutdowns using EPOW events target-ppc: Rework storage of VPA registration state pseries: Don't allow duplicate registration of hcalls or RTAS calls Add USB option in machine options e500: Fix serial initialization PPC: 440: Emulate DCBR0 ...
Diffstat (limited to 'target-ppc')
-rw-r--r--target-ppc/cpu.h7
-rw-r--r--target-ppc/mmu_helper.c2
-rw-r--r--target-ppc/translate_init.c9
3 files changed, 8 insertions, 10 deletions
diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h
index 3f114c983b..286f42a808 100644
--- a/target-ppc/cpu.h
+++ b/target-ppc/cpu.h
@@ -1045,10 +1045,9 @@ struct CPUPPCState {
#endif
#if defined(TARGET_PPC64) && !defined(CONFIG_USER_ONLY)
- hwaddr vpa;
- hwaddr slb_shadow;
- hwaddr dispatch_trace_log;
- uint32_t dtl_size;
+ hwaddr vpa_addr;
+ hwaddr slb_shadow_addr, slb_shadow_size;
+ hwaddr dtl_addr, dtl_size;
#endif /* TARGET_PPC64 */
int error_code;
diff --git a/target-ppc/mmu_helper.c b/target-ppc/mmu_helper.c
index 4a9bb5b965..811f47f309 100644
--- a/target-ppc/mmu_helper.c
+++ b/target-ppc/mmu_helper.c
@@ -1509,10 +1509,8 @@ static void mmubooke_dump_mmu(FILE *f, fprintf_function cpu_fprintf,
mask = ~(entry->size - 1);
ea = entry->EPN & mask;
pa = entry->RPN & mask;
-#if (TARGET_PHYS_ADDR_SPACE_BITS >= 36)
/* Extend the physical address to 36 bits */
pa |= (hwaddr)(entry->RPN & 0xF) << 32;
-#endif
size /= 1024;
if (size >= 1024) {
snprintf(size_buf, sizeof(size_buf), "%3" PRId64 "M", size / 1024);
diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c
index a972287035..e63627cac1 100644
--- a/target-ppc/translate_init.c
+++ b/target-ppc/translate_init.c
@@ -1498,7 +1498,7 @@ static void gen_spr_BookE (CPUPPCState *env, uint64_t ivor_mask)
/* XXX : not implemented */
spr_register(env, SPR_BOOKE_DBCR0, "DBCR0",
SPR_NOACCESS, SPR_NOACCESS,
- &spr_read_generic, &spr_write_generic,
+ &spr_read_generic, &spr_write_40x_dbcr0,
0x00000000);
/* XXX : not implemented */
spr_register(env, SPR_BOOKE_DBCR1, "DBCR1",
@@ -10425,9 +10425,10 @@ static void ppc_cpu_reset(CPUState *s)
env->error_code = 0;
#if defined(TARGET_PPC64) && !defined(CONFIG_USER_ONLY)
- env->vpa = 0;
- env->slb_shadow = 0;
- env->dispatch_trace_log = 0;
+ env->vpa_addr = 0;
+ env->slb_shadow_addr = 0;
+ env->slb_shadow_size = 0;
+ env->dtl_addr = 0;
env->dtl_size = 0;
#endif /* TARGET_PPC64 */