diff options
| author | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2016-07-27 16:56:43 +1000 |
|---|---|---|
| committer | David Gibson <david@gibson.dropbear.id.au> | 2016-09-07 12:40:11 +1000 |
| commit | c9f82d013be0d8d9c5d9f51bb76e337a0a5a5cac (patch) | |
| tree | 4e2e9edc209bb20ded9d88cd61c7ae089ae0aa6b /target-ppc/translate.c | |
| parent | 22b56ee5682e64509621f9d5d303a0414e289b11 (diff) | |
ppc: Speed up dcbz
Use tlb_vaddr_to_host to do a fast path single translate for
the whole cache line. Also make the reservation check match
the entire range.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'target-ppc/translate.c')
| -rw-r--r-- | target-ppc/translate.c | 11 |
1 files changed, 4 insertions, 7 deletions
diff --git a/target-ppc/translate.c b/target-ppc/translate.c index 7aa8d77972..ac2c79bf28 100644 --- a/target-ppc/translate.c +++ b/target-ppc/translate.c @@ -4088,18 +4088,15 @@ static void gen_dcbtls(DisasContext *ctx) static void gen_dcbz(DisasContext *ctx) { TCGv tcgv_addr; - TCGv_i32 tcgv_is_dcbzl; - int is_dcbzl = ctx->opcode & 0x00200000 ? 1 : 0; + TCGv_i32 tcgv_op; gen_set_access_type(ctx, ACCESS_CACHE); tcgv_addr = tcg_temp_new(); - tcgv_is_dcbzl = tcg_const_i32(is_dcbzl); - + tcgv_op = tcg_const_i32(ctx->opcode & 0x03FF000); gen_addr_reg_index(ctx, tcgv_addr); - gen_helper_dcbz(cpu_env, tcgv_addr, tcgv_is_dcbzl); - + gen_helper_dcbz(cpu_env, tcgv_addr, tcgv_op); tcg_temp_free(tcgv_addr); - tcg_temp_free_i32(tcgv_is_dcbzl); + tcg_temp_free_i32(tcgv_op); } /* dst / dstt */ |