diff options
| author | j_mayer <j_mayer@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-10-01 05:16:57 +0000 |
|---|---|---|
| committer | j_mayer <j_mayer@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-10-01 05:16:57 +0000 |
| commit | 7dbe11acd807b7a1566b2fe665333a49f8358de0 (patch) | |
| tree | b0c9681451bcb1d5631c564e8a5d6b9bd56bb725 /target-ppc/translate.c | |
| parent | 578bb25230229307c0b6ff62ae03ac0fbda27b18 (diff) | |
Handle all MMU models in switches, even if it's just to abort because of lack
of supporting code.
Implement 74xx software TLB model.
Keep 74xx with software TLB disabled, as Linux is not able to handle TLB miss
on those processors.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3307 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-ppc/translate.c')
| -rw-r--r-- | target-ppc/translate.c | 35 |
1 files changed, 33 insertions, 2 deletions
diff --git a/target-ppc/translate.c b/target-ppc/translate.c index e599243b73..d8f6e95c9e 100644 --- a/target-ppc/translate.c +++ b/target-ppc/translate.c @@ -4299,7 +4299,7 @@ GEN_HANDLER(mfrom, 0x1F, 0x09, 0x08, 0x03E0F801, PPC_602_SPEC) /* 602 - 603 - G2 TLB management */ /* tlbld */ -GEN_HANDLER(tlbld, 0x1F, 0x12, 0x1E, 0x03FF0001, PPC_6xx_TLB) +GEN_HANDLER(tlbld_6xx, 0x1F, 0x12, 0x1E, 0x03FF0001, PPC_6xx_TLB) { #if defined(CONFIG_USER_ONLY) GEN_EXCP_PRIVOPC(ctx); @@ -4314,7 +4314,7 @@ GEN_HANDLER(tlbld, 0x1F, 0x12, 0x1E, 0x03FF0001, PPC_6xx_TLB) } /* tlbli */ -GEN_HANDLER(tlbli, 0x1F, 0x12, 0x1F, 0x03FF0001, PPC_6xx_TLB) +GEN_HANDLER(tlbli_6xx, 0x1F, 0x12, 0x1F, 0x03FF0001, PPC_6xx_TLB) { #if defined(CONFIG_USER_ONLY) GEN_EXCP_PRIVOPC(ctx); @@ -4328,6 +4328,37 @@ GEN_HANDLER(tlbli, 0x1F, 0x12, 0x1F, 0x03FF0001, PPC_6xx_TLB) #endif } +/* 74xx TLB management */ +/* tlbld */ +GEN_HANDLER(tlbld_74xx, 0x1F, 0x12, 0x1E, 0x03FF0001, PPC_74xx_TLB) +{ +#if defined(CONFIG_USER_ONLY) + GEN_EXCP_PRIVOPC(ctx); +#else + if (unlikely(!ctx->supervisor)) { + GEN_EXCP_PRIVOPC(ctx); + return; + } + gen_op_load_gpr_T0(rB(ctx->opcode)); + gen_op_74xx_tlbld(); +#endif +} + +/* tlbli */ +GEN_HANDLER(tlbli_74xx, 0x1F, 0x12, 0x1F, 0x03FF0001, PPC_74xx_TLB) +{ +#if defined(CONFIG_USER_ONLY) + GEN_EXCP_PRIVOPC(ctx); +#else + if (unlikely(!ctx->supervisor)) { + GEN_EXCP_PRIVOPC(ctx); + return; + } + gen_op_load_gpr_T0(rB(ctx->opcode)); + gen_op_74xx_tlbli(); +#endif +} + /* POWER instructions not in PowerPC 601 */ /* clf */ GEN_HANDLER(clf, 0x1F, 0x16, 0x03, 0x03E00000, PPC_POWER) |