diff options
| author | aurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162> | 2009-02-03 19:56:09 +0000 |
|---|---|---|
| committer | aurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162> | 2009-02-03 19:56:09 +0000 |
| commit | 6e87b7c7bf4ead3ef2d59a657608901334da35cb (patch) | |
| tree | fb1896fe6d663abdf203d9e39cee03fe45dc56cb /target-ppc/translate.c | |
| parent | cf8358c8f784561e2ffd4d2eb66fccfca6301f67 (diff) | |
Make mtvscr use a helper
Do this so we can set float statuses once per mtvscr, rather than once
per Altivec instruction.
Signed-off-by: Nathan Froyd <froydnj@codesourcery.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6508 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-ppc/translate.c')
| -rw-r--r-- | target-ppc/translate.c | 9 |
1 files changed, 4 insertions, 5 deletions
diff --git a/target-ppc/translate.c b/target-ppc/translate.c index 1cc78cd9cd..59e4ced45d 100644 --- a/target-ppc/translate.c +++ b/target-ppc/translate.c @@ -6268,15 +6268,14 @@ GEN_HANDLER(mfvscr, 0x04, 0x2, 0x18, 0x001ff800, PPC_ALTIVEC) GEN_HANDLER(mtvscr, 0x04, 0x2, 0x19, 0x03ff0000, PPC_ALTIVEC) { - TCGv_i32 t; + TCGv_ptr p; if (unlikely(!ctx->altivec_enabled)) { gen_exception(ctx, POWERPC_EXCP_VPU); return; } - t = tcg_temp_new_i32(); - tcg_gen_trunc_i64_i32(t, cpu_avrl[rD(ctx->opcode)]); - tcg_gen_st_i32(t, cpu_env, offsetof(CPUState, vscr)); - tcg_temp_free_i32(t); + p = gen_avr_ptr(rD(ctx->opcode)); + gen_helper_mtvscr(p); + tcg_temp_free_ptr(p); } /* Logical operations */ |