diff options
| author | aurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-11-30 16:24:13 +0000 |
|---|---|---|
| committer | aurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-11-30 16:24:13 +0000 |
| commit | 37d269dfc6ccbfc3871d458c426e089e0c4403b6 (patch) | |
| tree | 5f39ce517b50e2099b6f7e2e6ba464542c3f262b /target-ppc/op_helper.c | |
| parent | 799a8c8d0a33ee8732407530f1a06a649be3b0bc (diff) | |
target-ppc: convert icbi instruction to TCG
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5827 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-ppc/op_helper.c')
| -rw-r--r-- | target-ppc/op_helper.c | 26 |
1 files changed, 26 insertions, 0 deletions
diff --git a/target-ppc/op_helper.c b/target-ppc/op_helper.c index 6f6f1ec23d..98c428990a 100644 --- a/target-ppc/op_helper.c +++ b/target-ppc/op_helper.c @@ -210,6 +210,32 @@ void helper_dcbz_970(target_ulong addr) do_dcbz(addr, env->dcache_line_size); } +void helper_icbi(target_ulong addr) +{ + uint32_t tmp; + + addr = get_addr(addr & ~(env->dcache_line_size - 1)); + /* Invalidate one cache line : + * PowerPC specification says this is to be treated like a load + * (not a fetch) by the MMU. To be sure it will be so, + * do the load "by hand". + */ +#ifdef CONFIG_USER_ONLY + tmp = ldl_raw(addr); +#else + switch (env->mmu_idx) { + default: + case 0: tmp = ldl_user(addr); + break; + case 1: tmp = ldl_kernel(addr); + break; + case 2: tmp = ldl_hypv(addr); + break; + } +#endif + tb_invalidate_page_range(addr, addr + env->icache_line_size); +} + /*****************************************************************************/ /* Fixed point operations helpers */ #if defined(TARGET_PPC64) |