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authorj_mayer <j_mayer@c046a42c-6fe2-441c-8c8c-71466251a162>2007-04-24 06:50:21 +0000
committerj_mayer <j_mayer@c046a42c-6fe2-441c-8c8c-71466251a162>2007-04-24 06:50:21 +0000
commit35cdaad645d7a97e67690582feb1fc3a050c92ad (patch)
tree9a628a9108b9be0e9ea3a56f8b4b85b9bfcbceb1 /target-ppc/exec.h
parentc294fc587a52f4991b1dcbb328b5a9d09f8c8e2e (diff)
Code provision for new PowerPC embedded target support with:
- 1 kB page size - 64 bits GPR - 64 bits physical address space - SPE extension support. Change TARGET_PPCSPE into TARGET_PPCEMB git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2718 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-ppc/exec.h')
-rw-r--r--target-ppc/exec.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/target-ppc/exec.h b/target-ppc/exec.h
index a0f91ccd40..4f5abe906a 100644
--- a/target-ppc/exec.h
+++ b/target-ppc/exec.h
@@ -43,7 +43,7 @@ register unsigned long T1 asm(AREG2);
register unsigned long T2 asm(AREG3);
#endif
/* We may, sometime, need 64 bits registers on 32 bits target */
-#if defined(TARGET_PPC64) || defined(TARGET_PPCSPE) || (HOST_LONG_BITS == 64)
+#if defined(TARGET_PPC64) || defined(TARGET_PPCEMB) || (HOST_LONG_BITS == 64)
#define T0_64 T0
#define T1_64 T1
#define T2_64 T2